Identifying the spatial position and properties of traps in GaN HEMTs using current transient spectroscopy

Zheng, Xiu Cheng; Zhang, Yamin; Yang, Jingzhou

doi:10.1016/j.microrel.2016.05.001

Cited by 24 publications

(9 citation statements)

References 31 publications

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“…7,8 Another popular approach is to build the derivative of the relaxation curve on the logarithm of time, find the peaks in such plots, and trace the peak position variation with temperature to extract the activation energy and capture cross section of the traps.…”

mentioning

confidence: 99%

“…Both the capture and emission process from these traps can be studied by analysis of gate and drain transients as a function of pulsing conditions and temperature by using current or capacitance deep level transient spectroscopy (CDLTS or DLTS) [2][3][4][5] or by direct measurements of individual transients. 1,[6][7][8][9] These measurements provide the concentration and position of the traps involved and their capture cross sections. This is complicated by the presence of multiple traps, strong non-uniform electrical and strain fields, and the contribution of the band-like states related to extended defects and to surface or interface states.…”

mentioning

confidence: 99%

“…6 Various methods to improve the convergence and reproducibility of the procedure exist. 7,8 Another popular approach is to build the derivative of the relaxation curve on the logarithm of time, find the peaks in such plots, and trace the peak position variation with temperature to extract the activation energy and capture cross section of the traps. 2,3,9 The number of peaks in either approach is quite limited (typically, 2-3) in either method, 9 but the peaks are generally broad which requires invoking a large number of exponents to attain good fit in the basic method, 6 while providing no knowledge on the physical nature of broadening.…”

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confidence: 99%

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Gate-Lag in AlGaN/GaN High Electron Mobility Transistors: A Model of Charge Capture

Polyakov

Smirnov

Shchemerov

et al. 2017

ECS J. Solid State Sci. Technol.

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Gate and drain current transients following the application of a step/pulse reverse bias to the gate of AlGaN/GaN HEMTs can be described by a superposition of 2-3 extended exponents with characteristic times of the main process having activation energy of 0.7-0.8 eV. The drain current relaxation is a consequence of charge trapping and movement in the AlGaN barrier. A qualitative model explains this process by movement of a step of charge trapped on deep states in the barrier and movement of the step toward the interface by multiple emission/capture hops. The process is assumed to be confined to channels in AlGaN (presumably dislocations) surrounded by potential barriers, preventing effective injection of the carriers into the channels with forward bias pulses. The model qualitatively explains the often reported appearance of hole-trap-like signals in deep level studies of AlGaN/GaN HEMT structures and the persistent changes in capacitance and current of these structures occurring upon pulsing and illumination. One of the most serious problems with III-Nitrides-based high electron mobility transistors (HEMTs) is the phase delay of the drain current upon pulsed change of the gate bias, so called "gate-lag". [1][2][3] This phenomenon causes increase of the switching time and long-term drift of the threshold voltage and the drain current. The generally accepted view is the gate-lag is caused by trapping of electrons flowing from the gate at high reverse voltage and subsequent capture of electrons by deep centers under the gate. Both the capture and emission process from these traps can be studied by analysis of gate and drain transients as a function of pulsing conditions and temperature by using current or capacitance deep level transient spectroscopy (CDLTS or DLTS) 2-5 or by direct measurements of individual transients.1,6-9These measurements provide the concentration and position of the traps involved and their capture cross sections. This is complicated by the presence of multiple traps, strong non-uniform electrical and strain fields, and the contribution of the band-like states related to extended defects and to surface or interface states. As a result, the drain and gate current relaxation curves are non-exponential. A common approach is the deconvolution of the actual relaxations into a sum of independent exponential relaxations and fitting the pre-exponential coefficients to experiment.6 Various methods to improve the convergence and reproducibility of the procedure exist. 7,8 Another popular approach is to build the derivative of the relaxation curve on the logarithm of time, find the peaks in such plots, and trace the peak position variation with temperature to extract the activation energy and capture cross section of the traps.2,3,9 The number of peaks in either approach is quite limited (typically, 2-3) in either method, 9 but the peaks are generally broad which requires invoking a large number of exponents to attain good fit in the basic method, 6 while providing no knowledge on the physical nature o...

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Gate-Lag in AlGaN/GaN High Electron Mobility Transistors: A Model of Charge Capture

Polyakov

Smirnov

Shchemerov

et al. 2017

ECS J. Solid State Sci. Technol.

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“…The algorithm has no data length constraints and can obtain signal parameters under certain signal-to-noise ratios. Bayesian deconvolution is widely used in medical image processing [4] [5], astronomical image processing [6], reliability studies of electronic components [7], and thermal characterization of semiconductors [8]. FPGAs are popular for numerical computing because of their customizability and high parallelism.…”

Section: Introductionmentioning

confidence: 99%

FPGA-based Bayesian deconvolution algorithm acceleration and encryption scheme

Liu¹,

Feng²

2023

International Conference on Computer, Artificial Intelligence, and Control Engineering (CAICE 2023)

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In this paper, we analyze the existing C code for the Bayesian deconvolution algorithm and propose an improved scheme for a CPU platform. The improved algorithm is implemented on an FPGA and functional verification is performed. A complete FPGA hardware acceleration system is then constructed to realize data communication and computation between the FPGA and the upper-level computer. Four-way parallel computation on the FPGA platform is designed and optimized to improve the computational efficiency. The algorithm is implemented through dedicated hardware servers to protect the intellectual property of the software algorithm.

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“…Until now, various methods, such as current transient response, frequency-dependent g m dispersion and conductance analysis, and real-time electroluminescence measurement have been employed in order to deeply understand the electrontrapping process. 5,[7][8][9][10] Among these methods, transient I d response measurement is an effective technique to clarify the time constants of the trapping and de-trapping effects. [11][12] The changes of the time constant give us the locations where a trapping process occurs and the activation energy of the electron traps in GaN HEMTs.…”

Section: Introductionmentioning

confidence: 99%

Transient response of drain current following biasing stress in GaN HEMTs on SiC substrates with a field plate

Yoshida

Ando

et al. 2020

Jpn. J. Appl. Phys.

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This paper investigates the current collapse and transient response of a drain current (Id) following the transition to an off-state in GaN high-electron-mobility transistors (HEMTs) on SiC substrates. Within a short time (∼10−3 s.) after an Id transition, significant current collapse and delayed recovery are observed in GaN HEMTs with a long gate-to-drain distance (Lgd). Moreover, at least two time constants (τ1 and τ2) are found to exist in HEMTs with an Lgd of over 4.0 μm. As the Lgd becomes longer, the activation energy required for electron emission is increased from 0.46 to 0.65 eV, which causes the time constant (τ2) to rise. Furthermore, the period of the off-state affects the time constants of GaN HEMTs without a field plate (FP). An extension of the off-state leads to an increase in the activation energy of the de-trapping process, and τ1 and τ2 are increased from 13 to 21 ms and from 150 to 350 ms, respectively.

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Identifying the spatial position and properties of traps in GaN HEMTs using current transient spectroscopy

Cited by 24 publications

References 31 publications

Gate-Lag in AlGaN/GaN High Electron Mobility Transistors: A Model of Charge Capture

Gate-Lag in AlGaN/GaN High Electron Mobility Transistors: A Model of Charge Capture

FPGA-based Bayesian deconvolution algorithm acceleration and encryption scheme

Transient response of drain current following biasing stress in GaN HEMTs on SiC substrates with a field plate

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