Metal-oxide-semiconductor (MOS) capacitors with an amorphous Ta 1Àx Zr x O composite gate dielectric film and a SiO 2 passivation layer were fabricated on an indium phosphide (InP) substrate. To investigate the impact of the passivation layer, the interfacial chemical, physical and electrical properties of the Ta 1Àx Zr x O/InP and Ta 1Àx Zr x O/SiO 2 /InP MOS structures were studied in detail. Electrical conductivity measurements combined with chemical bonding analysis using X-ray photoelectron spectroscopy (XPS) and electron dispersive spectroscopy (EDS) were conducted in order to evaluate the suitability of a Ta 1Àx Zr x O alloy as a gate dielectric film for an InP substrate. XPS results showed that the Ta 1Àx Zr x O film retained its insulating characteristics and was thermally stable even after annealing at 500 1C. However, Fermi-level pinning and significant diffusion of indium through the Ta 1Àx Zr x O were observed. The diffusion of In was remarkably reduced after introducing the SiO 2 passivation layer, which resulted in an overall reduction in interfacial layer thickness. Parallel conductance contour measurements showed that the SiO 2 passivation layer resulted in unpinning of the Fermi-level. The introduction of a SiO 2 passivation layer with the Ta 1Àx Zr x O composite gate dielectric film was found to provide remarkably improved dielectric performance, which was mainly attributed to reduced In diffusion and the passivation of interfacial and bulk dielectric defects.