2003
DOI: 10.1016/s0168-9002(03)01804-7
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Hybrid active pixel sensors and SOI inspired option

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Cited by 18 publications
(5 citation statements)
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“…More details on this interesting new technology has been reported at this conference and can be found in [60]. (left) Cross section through a monolithic CMOS on SOI pixel detector using high resistivity silicon bulk insolated from the low resistivity CMOS layer with connecting vias in between [61,59], (right) cross section through a structure using amorphous silicon on top of standard CMOS VLSI electronics [62,63].…”
Section: Cmos Technology With Charge Collection In Epi-layermentioning
confidence: 99%
“…More details on this interesting new technology has been reported at this conference and can be found in [60]. (left) Cross section through a monolithic CMOS on SOI pixel detector using high resistivity silicon bulk insolated from the low resistivity CMOS layer with connecting vias in between [61,59], (right) cross section through a structure using amorphous silicon on top of standard CMOS VLSI electronics [62,63].…”
Section: Cmos Technology With Charge Collection In Epi-layermentioning
confidence: 99%
“…Despite using CMOS technology the potential of full CMOS circuitry in the active area is not available (only nMOS) because of the n-well/p-epi collecting diode which does not permit other n-wells. [15], [47], (B) CROSS SECTION THROUGH A STRUCTURE USING AMORPHOUS SILICON ON TOP OF STANDARD CMOS VLSI ELECTRONICS [48], [49].…”
Section: Monolithic and Semi-monolithic Pixel Detectorsmentioning
confidence: 99%
“…Fig. 12(A) CROSS SECTION THROUGH A MONOLITHIC CMOS ON SOI PIXEL DETECTOR USING HIGH RESISTIVITY SILICON BULK INSOLATED FROM THE LOW RESISTIVITY CMOS LAYER WITH CONNECTING VIAS IN BETWEEN[15],[47], (B) CROSS SECTION THROUGH A STRUCTURE USING AMORPHOUS SILICON ON TOP OF STANDARD CMOS VLSI ELECTRONICS[48],[49].…”
mentioning
confidence: 99%
“…Monolithic Active Pixel based on SOI technology has been proposed as an ultimate monolithic sensor approach for tracking detectors due to the fact that the sensor and front-end readout electronics with different requirements on silicon parameters can be integrated into a single chip [1]. Such a technology offers fabrication of devices with a large number of readout channels with fine segmentation at a small cost.…”
Section: Introductionmentioning
confidence: 99%