Hot-Electron-Induced Punch-Through (HEIP) Effect in p-MOSFET Enhanced by Mechanical Stress

Lee, Kookjin; Kaczer, B.; Kruv, Anastasiia; González, Mario; Degraeve, R.; Tyaginov, Stanislav; Grill, Alexander; Wolf, Ingrid De

doi:10.1109/led.2021.3104885

Cited by 11 publications

(6 citation statements)

References 31 publications

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“…However, the model considered only the contribution of primary carriers to HCD, and the contribution of secondary carriers generated by impact ionization (II) was not implemented. On the other hand, in our recent publications, we demonstrated both experimentally [28] and theoretically [29,30] that under HC conditions with V gs substantially lower than V ds , secondary carriers provide a strong contribution to HCD. Moreover, secondary carriers generated by impact ionization were shown to give rise to the so-called turn-around effect when contributions to total damage related to primary and secondary carriers partially compensate each other.…”

Section: Introductionmentioning

confidence: 78%

Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range

Tyaginov,

Bury,

Grill

et al. 2023

Micromachines

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We develop a compact physics model for hot-carrier degradation (HCD) that is valid over a wide range of gate and drain voltages (Vgs and Vds, respectively). Special attention is paid to the contribution of secondary carriers (generated by impact ionization) to HCD, which was shown to be significant under stress conditions with low Vgs and relatively high Vds. Implementation of this contribution is based on refined modeling of carrier transport for both primary and secondary carriers. To validate the model, we employ foundry-quality n-channel transistors and a broad range of stress voltages {Vgs,Vds}.

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Section: Introductionmentioning

confidence: 78%

Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range

Tyaginov,

Bury,

Grill

et al. 2023

Micromachines

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“…Representative time evolutions of HCD in NS pFETs under high-Vg and Mid-Vg stress conditions are shown in Figure 17. Note that Mid-Vg HCD in NS pFETs at low stress drain voltages no longer follows power law time dependence and is dominated by electron trapping for a short stress time, causing a current increase in contrast to the current decrease resultant from interface state generation and hole trapping [62,63].…”

Section: Hci Reliabilitymentioning

confidence: 99%

A Review of Reliability in Gate-All-Around Nanosheet Devices

Wang

2024

Micromachines

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The gate-all-around (GAA) nanosheet (NS) field-effect-transistor (FET) is poised to replace FinFET in the 3 nm CMOS technology node and beyond, marking the second seminal shift in device architecture across the extensive 60-plus-year history of MOSFET. The introduction of a new device structure, coupled with aggressive pitch scaling, can give rise to reliability challenges. In this article, we present a review of the key reliability mechanisms in GAA NS FET, including bias temperature instability (BTI), hot carrier injection (HCI), gate oxide (Gox) time-dependent dielectric breakdown (TDDB), and middle-of-line (MOL) TDDB. We aim to not only underscore the unique reliability attributes inherent to NS architecture but also provide a holistic view of the status and prospects of NS reliability, taking into account the challenges posed by future scaling.

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“…In addition, an extremely thin base region or a base region with a low doping concentration can lead to the punch-through effect, which results in the disappearance of an electrically neutral base region and the conversion of an entire base region into a depletion region with a high electric field. 41 Then electrons in the emitting region can drift directly to the collector region and a large collector current is generated similar to an avalanche breakdown. The study focused on the effect of the thickness and doping of the base region on anode I−V characteristics, current gain and IQE.…”

Section: Structural Optimization Of the Uvpt-μledmentioning

confidence: 99%

Design and Photomodulation Performance of a UV-Driven Full GaN Integrated μLED and BJT Phototransistor

Su,

Wang,

Zou

et al. 2024

ACS Photonics

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A vertical integration of indium gallium nitride/ gallium nitride (InGaN/GaN)-based microlight-emitting diode (μLED) and GaN ultraviolet bipolar junction transistor (BJT) phototransistor (UVPT), based on the same GaN material and process platform (UVPT-μLED), was proposed. The integrated device is a novel integrated device with light-emitting, detecting, sensing, driving and regulating functions. It can be used as a receiver and transmitter. The light-emission effect of the μLED on UVPT can be regulated by changing the power of an external light. Optical-electrical-optical conversion was conducted with Silvaco TCAD software. Electro-optic modulation characteristics and optical power amplification were attained through a Silvaco TCAD simulation. By optimization of the size and concentration of the device epitaxial, the current gain of the optimized device reaches a maximum of 240. The UVPT-μLED device shows a strong response to small-power light and a stable response to high-power light. The UVPT-μLED chip with a high switching ratio was successfully prepared and used to verify the feasibility of the UVPT-μLED device. The proposed monolithic integrated device not only can be used for traditional displays but also shows great potential in intelligent displays, such as human−computer interactive systems, on-chip optical interconnects, photonic chips and visible-light communications.

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Hot-Electron-Induced Punch-Through (HEIP) Effect in p-MOSFET Enhanced by Mechanical Stress

Cited by 11 publications

References 31 publications

Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range

Compact Physics Hot-Carrier Degradation Model Valid over a Wide Bias Range

A Review of Reliability in Gate-All-Around Nanosheet Devices

Design and Photomodulation Performance of a UV-Driven Full GaN Integrated μLED and BJT Phototransistor

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