“…The first signal, often labelled N1, appears at low temperature (T < 150 K) and its DTLS signal after pulses with V r , V p < 0 (V r reverse bias, V p pulse bias) appears with a sign opposite to that expected for majority carrier traps in a bulk semiconductor. Its peculiar 20 properties in DLTS and admittance spectroscopy have been the source of a long debate about its origin [3,4,5,6,7,8,9]. The signal has been interpreted as a bulk acceptor, interface defects, hopping conduction freeze out and non-ideality at the back contact.…”