Holistic Approach toward a Damage-Less Sputtered Indium Tin Oxide Barrier Layer for High-Stability Inverted Perovskite Solar Cells and Modules

Abstract

The commercialization of perovskite solar cells (PSCs) requires the development of long-term, highly operational-stable devices. An efficient barrier layer plays a key role in improving the device stability of planar PSCs. Here, we focus on the use of sputtered indium tin oxide (ITO) as a barrier layer to stop major degradations. To mitigate efficiency losses of cells with the ITO barrier, we optimized various sputtering process parameters such as ITO layer thickness, target power density, and working pressure. The fabricated planar inverted PSCs based on the novel ITO barrier optimization demonstrate a power conversion efficiency (PCE) of 19.05% on a cell area of 0.09 cm 2 . The encapsulated cells retained >80% of their initial efficiency after 1400 h of continuous illumination at 55 °C and 94.5% of their initial PCE after 1500 h stored in air. Employing such a holistic stabilization approach, the PSC minimodules without encapsulation achieved an efficiency of 16.4% with a designated area of 2.28 cm 2 and retained approximately 80% of the initial performance after thermal stress at 85 °C for 350 h under ambient conditions.

Flexible, Transparent, and Bifacial Perovskite Solar Cells and Modules Using the Wide-Band Gap FAPbBr3 Perovskite Absorber

“…The HTL choice is essential in PSCs, as the alignment of the band structures between the HTL and the perovskite layer plays a critical role in determining the V OC and performance of PSCs. , However, in the case of bifacial solar cells with the n–i–p architecture, the choice of the HTL becomes even more crucial, particularly when bifaciality is claimed as a potential way to increase the power generation thanks to albedo reflections. , In the bifacial operation mode, the parasitic absorption in the HTL can compromise the light harvesting of the perovskite absorber when the ST-PSC is illuminated from the ITO back-contact. Furthermore, the sputtering process used to deposit ITO can potentially cause damage to the HTL, leading to a decrease in the overall device performance . To gain a deeper understanding of FAPbBr 3 -based flex ST-PSCs, a comparative analysis was performed on two different HTLs: PTAA and poly-TPD (PTPD).…”

“…Furthermore, the sputtering process used to deposit ITO can potentially cause damage to the HTL, leading to a decrease in the overall device performance. 53 To gain a deeper understanding of FAPbBr 3based flex ST-PSCs, a comparative analysis was performed on two different HTLs: PTAA and poly-TPD (PTPD).…”

Ion-Beam Sputtering of NiOx Hole Transporting Layers for p–i–n Halide Perovskite Solar Cells

“…However, the MS processing has several critical features; the direct interaction of the plasma and the substrate could be accompanied by the formation of the discharge arcs, which induce the damaging of the growing film. 15 Recently, Reddy et al 16 presented a complex investigation for the critical parameters in damage-less MS of barrier films in p−i−n PSCs. Alternatively, ion-beam sputtering (IBS) can be applied to the deposition of the oxide CTLs.…”

Semitransparent Perovskite Solar Cells with Ultrathin Protective Buffer Layers

“…During the process, in addition to the sputtered target particles, other species can strike the substrate, such as negative ions (up to 400 eV) and high energy electrons (up to 200 eV). This phenomenon, together with plasma-luminescence and induced heat, can hardly affect sensitive layers and surface or bulk damage of the substrate can occur. ,, In ST-PSCs, the sputtering damage can cause an increased series resistance and an increment of the energy barrier height at the interface between the electron or hole transport layer (ETL or HTL) and the sputtered TCO. This can hinder the carrier transport resulting in the typical “ S -shape” affecting the device current–voltage ( I – V ) curve. ,,, To avoid the sputtering damage issue, process parameters can be tuned to optimize a soft sputtering process, − or a protective buffer layer (PBL) can be introduced. − …”

“…This phenomenon, together with plasma-luminescence and induced heat, can hardly affect sensitive layers and surface or bulk damage of the substrate can occur. 22 , 25 , 26 In ST-PSCs, the sputtering damage can cause an increased series resistance and an increment of the energy barrier height at the interface between the electron or hole transport layer (ETL or HTL) and the sputtered TCO. This can hinder the carrier transport resulting in the typical “ S -shape” affecting the device current–voltage ( I – V ) curve.…”