HKMG CMOS technology qualification: The PBTI reliability challenge

Charge Trapping Control in MOS Capacitors

“…Dielectric charge trapping is widely known as an important reliability issue in MOS capacitors and related structures such as ultra-thin gate oxides used in MOSFETs [1], or in MEMS. This phenomenon alters device performance, affecting its circuital features and even reducing its effective lifetime.…”

Intrinsic electron traps in atomic-layer deposited HfO2 insulators

“…3,4 Furthermore, thanks to the ferroelectricity property of both doped 5,6 and pure 7 HfO 2 , novel applications including memories 8 and high sub-threshold slope transistors 9 are envisioned. However, the reliability of the dielectric associated with electron trapping appears to be the "show stopper": It has already been shown that the positive bias-temperature instability (PBTI) limits the gate oxide scaling in metal-HfO 2 -Si transistors [10][11][12][13] while in flash cells, electron trapping in the intergate HfO 2 insulator degrades the program/erase window, retention, and endurance. 14,15 Moreover, in ferroelectric applications, trapping of electrons within HfO 2 will screen the electric field at the surface of the semiconductor channel, thus directly impairing the device functionality.…”

On the scaling of subnanometer EOT gate dielectrics for ultimate nano CMOS technology

“…Yet, amongst all these issues, the interface properties and their thermal instabilities need to be resolved firstly [64][65][66][67][68][69][70][71][72]. Transition metal (TM) or rare-earth metal (RE) based high-k dielectrics are extrinsic materials to the substrate silicon.…”

“…It was proposed that the oxygen in W may diffuse into the La 2 O 3 film to fill up the oxygen vacancies there. Oxygen vacancies are the major defect centers in La 2 O 3 which result in several instability issues and enhance the gate leakage current [59][60][61][62][63][64][65][66][67][68][69][70][71]. Post-metallization annealing may cause an reverse effect.…”

“…Most of the high-k silicides are conductive. The interfacial silicide layer would not affect the EOT but the interface metal-Si bonding is one of the interface trap precursors and results in the channel mobility degradation and in other instabilities [2,[59][60][61][62][63][64][65][66][67][68][69][70]. Most of the high-k materials, including hafnium oxide and lanthanum oxide are only marginally stable against the formation of silicates.…”