History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors

Jooya, Ali; Baniasadi, Amirali; Analoui, Morteza

doi:10.1049/iet-cdt.2009.0045

Cited by 11 publications

(12 citation statements)

References 15 publications

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“…There are several proposals of dynamic schedulers in the literature [5,14,13,10], many of them used by the runtime environments mentioned above. In [5] the authors focus on a strategy that aims at minimizing the workload between processing units.…”

Section: Related Workmentioning

confidence: 99%

“…Based on this prediction, the tasks are associated the less busy PUs, aiming to balance to load between the PUs. In [10] is presented a similar proposal, where such execution models are based on past run-time histories. Despite all these strategies have presented good results in scenarios in which they propose to work, they are not general enough to achieve good performance in different application scenarios.…”

Section: Related Workmentioning

confidence: 99%

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Efficient dynamic scheduling of heterogeneous applications in hybrid architectures

Andrade

Ramos

Madeira

et al. 2014

Proceedings of the 29th Annual ACM Symposium on Applied Computing

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The emergence of different applications that deal with growing amounts of data at reasonable times, has stimulated the development of new computing architectures consisting of different processing units (PU). Runtime environments have been proposed in order to exploit these resource as much as possible by offering a variety of methods for dynamically scheduling tasks on different PUs. These schedulers determine which PU is better suited for executing each task, based upon a set of task parameters such as the amount of data, computation requirements, etc. Although large number of applications are heterogeneous, composed of tasks with different characteristics, the current techniques focus on these characteristics as isolated features leading to inefficient executions in several situations. In this work we present two new scheduling strategies, combining different existing strategies, that leads to more efficient executions in different scenarios. Our results show that our approach can be up to 20% more efficient than current techniques.

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Section: Related Workmentioning

confidence: 99%

Section: Related Workmentioning

confidence: 99%

Efficient dynamic scheduling of heterogeneous applications in hybrid architectures

Andrade

Ramos

Madeira

et al. 2014

Proceedings of the 29th Annual ACM Symposium on Applied Computing

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“…History-aware resource-based dynamic scheduling for heterogeneous multi-core processors [18] introduces a history-aware, resource-based dynamic scheduler (HARD) for heterogeneous chip multi-processors (CMPs). HARD relies on recording application resource utilization and throughput to adaptively change cores for applications during runtime.…”

Section: Related Workmentioning

confidence: 99%

An Optimized and Efficient Multi Parametric Scheduling Approach for Multi-Core Systems

Mittal¹,

Sharma²

2013

IJCTE

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Abstract-Multi-core processor technologies have become pervasive and mainstream. Several types of multi-core CPUs, including symmetric and asymmetric models, are emerging. A multi-core processor architecture may be defined as: on-chip clusters of heterogeneous functionality modules (processors), cooperating in the implementation of multiple concurrent applications. On these platforms, developing applications that truly take advantage of the power of multi-core capabilities is still a complex, error-prone, and challenging endeavor. Application code must be tuned to optimally fit the available resources. Operating System procedures must cover issues at lower abstraction layers, close to firmware, in order to enable features like optimal task/thread level scheduling depending upon the application requirements on the appropriate processor as per its characteristic. For Efficient scheduling of task or thread on multi core system the operating system scheduler must be aware about the underlying heterogeneity present in the system, also it must be aware about the characteristics of application (at static and at run time). Because as per the characteristic of the executing application the scheduler can take decision to schedule the task on available core so that optimal performance and good throughput can be achieved.

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“…In a related approach, Jooya et al [20] introduced the history-aware, resource dynamic (HARD) scheduler for heterogeneous chip multiprocessors. The HARD scheduler performs the reassignment of jobs to cores when an application phase change occurs by "upgrading" or "downgrading" the assignment to a higher-performance or more power efficient core, respectively.…”

Section: B Mapping Applications To Coresmentioning

confidence: 99%

Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors

Sawalha

Wolff

Tull

et al. 2011

2011 14th Euromicro Conference on Digital System Design

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Single-ISA heterogeneous (also known as asymmetric) multicore processors offer significant advantages over homogenous multicores in terms of both power and performance. Power-efficient cores can be paired with higherperformance cores to achieve advantageous power/performance tradeoffs. Unfortunately, such processors also create unique challenges in effective mapping of processes to cores. The greater the diversity of cores, the more complex this problem becomes. Previous scheduling approaches sample performance while permuting the schedule across each type of core each time a change in application behavior is detected. However, approaches that require frequent sampling of the performance of threads (or combinations of threads) on each core may be impractical. We propose scheduling threads on a heterogeneous multicore processor using not just the detection of a change in program behavior or phase, but instead an identification and recording of these phase behaviors. We highlight the correlation between the execution phases of an application and the performance of those phases on any particular core type. We present mechanisms that exploit this correlation between program phases and appropriate scheduling decisions and demonstrate near optimal mapping of thread segments to processor cores can be done without frequently sampling the performance of each thread on each processor core type.

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History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors

Cited by 11 publications

References 15 publications

Efficient dynamic scheduling of heterogeneous applications in hybrid architectures

Efficient dynamic scheduling of heterogeneous applications in hybrid architectures

An Optimized and Efficient Multi Parametric Scheduling Approach for Multi-Core Systems

Phase-Guided Scheduling on Single-ISA Heterogeneous Multicore Processors

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