2006
DOI: 10.1109/jssc.2006.874059
|View full text |Cite
|
Sign up to set email alerts
|

Highly Linear 0.18-<tex>$mu$</tex>m CMOS Power Amplifier With Deep n-Well Structure

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
22
0

Year Published

2007
2007
2016
2016

Publication Types

Select...
6
4

Relationship

0
10

Authors

Journals

citations
Cited by 46 publications
(22 citation statements)
references
References 12 publications
0
22
0
Order By: Relevance
“…The maximum output power is over 24dBm, and the maximum P AE is over 34%. Table I compares the results with those from previous works [6][7][8][9]. Notably, [7] and [8] use off-board output matching networks.…”
Section: B Load-pull Match and Sensitivity Of Inductormentioning
confidence: 90%
“…The maximum output power is over 24dBm, and the maximum P AE is over 34%. Table I compares the results with those from previous works [6][7][8][9]. Notably, [7] and [8] use off-board output matching networks.…”
Section: B Load-pull Match and Sensitivity Of Inductormentioning
confidence: 90%
“…1 shows a simplified schematic of the suggested two stage single-ended CMOS linear PA. A single-ended topology is chosen for easier integration, costeffectiveness, and avoidance of baluns although a differential configuration has the advantage of the even harmonics control. [5] To reduce the noise coupling with other components on the same silicon substrate, a deep Nwell [6] is employed for both the driver and power cells. For the reliability of the devices at 3.4V operation, a 0.4-um thick-oxide NMOS transistor is used in the power stage cascode CG transistor, and 0.18-um NMOS transistors are used for the both of CG and CS in the driver stage to compensate for the low RF power gain of the thick-oxide CG transistor in the power stage.…”
Section: Circuit Design Methodologymentioning
confidence: 99%
“…Among the circuit parameters, the input capacitance has a major effect on the linearity of largesignal circuits. The deep n-well structure of NMOS reduces distortions caused by nonconstant gate-source capacitance [10]. Also, capacitance compensation using a PMOS device is widely used in CMOS PAs [11,12].…”
Section: Linearization Techniques In Cmos Power Amplifiersmentioning
confidence: 99%