High Yield Embedding of 30μm Thin Chips in a Flexible PCB using a Photopatternable Polyimide based Ultra-Thin Chip Package (UTCP)

Sterken, Tom; Beeck, Maaike Op de; Vermeiren, Filip; Torfs, Tom; Wang, L.; Priyabadini, Swarnakamal; Dhaenens, Kristof; Cuypers, Dieter; Vanfleteren, Jan

doi:10.4071/isom-2012-wp52

Cited by 5 publications

(4 citation statements)

References 7 publications

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“…In this way a self-aligned cavity is created for all the chips at once [6,10,15]. After curing, the process continues by applying the top layer and opening the vias to the contact pads, again using photolithography [6-7, 10, 15].…”

Section: A Utcp Fabrication Processmentioning

confidence: 99%

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

Priyabadini

Sterken

Cauwe

et al. 2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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Abstract-Getting output of multiple chips within the volume of a single chip is the driving force behind development of this novel 3D integration technology, which has a broad range of industrial and medical electronic applications. This goal is achieved in a two-step approach: at first thinned dies are embedded in a polyimide interposer with a fine-pitch metal fan-out resulting Ultra-Thin Chip Packages (UTCP), next these UTCPs are stacked by lamination.Step height at the chip edge of these UTCPs is the major reason of die cracking during the lamination. This paper contains an approach to solve this issue by introduction of an additional layer of interposer which makes it flat at the chip edge resulting in Flat-UTCP. In addition to that, randomness in non-functional package positions per panels reduces the overall yield of the whole process up to certain extend. A detailed analysis on these two issues to improve the process yield is given in this paper. 3D-stacked memory module composed of 4 EEPROM dies was processed and tested to demonstrate this new concept of enhanced fabrication yield.

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Section: A Utcp Fabrication Processmentioning

confidence: 99%

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

Priyabadini

Sterken

Cauwe

et al. 2014

IEEE Trans. Compon., Packag. Manufact. Technol.

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“…Polyimide, as well as BCB, can be applied by spin coating, resulting in thin layers with homogenous thicknesses [ 13 , 14 , 15 ]. Openings in the polymeric layer can be established by laser drilling [ 10 , 16 , 17 , 18 , 19 ] or photolithography [ 20 , 21 , 22 ]. Afterwards, conductive tracks are applied.…”

Section: Introductionmentioning

confidence: 99%

Embedding of Ultrathin Chips in Highly Flexible, Photosensitive Solder Mask Resist

et al. 2021

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This work presents an embedding process for ultrathin silicon chips in mechanically flexible solder mask resist and their electrical contacting by inkjet printing. Photosensitive solder mask resist is applied by conformal spray coating onto epoxy bonded ultrathin chips with a daisy chain layout. The contact pads are opened by photolithography using UV direct light exposure. Circular and rectangular openings of 90 µm and 130 µm diameter, respectively, edge length are realized. Commercial inks containing nanoparticular silver and gold are inkjet printed to form conductive tracks between daisy chain structures. Different numbers of ink layers are applied. The track resistances are characterized by needle probing. Silver ink shows low resistances only for multiple layers and 90 µm openings, while gold ink exhibits low resistances in the single-digit Ω-range for minimum two printed layers.

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“…In some cases a full functionality test is possible using a probe card. In [4], the yield of packaging microcontrollers was measured to be 87%, while a DSP processor was packaged with a yield of 62%.…”

Section: Cavity Layermentioning

confidence: 99%

“…A summary of the process flow used in this work is given in figure 1. As the process flow has been described in detail in the following publications [4,5,6], we will however restrict ourselves to highlighting the most significant changes since 2006:…”

Section: Utcp Interposermentioning

confidence: 99%

Embedding thinned chips in flexible PCBs

Sterken

Vermeiren

Tremlett

et al. 2012

2012 4th Electronic System-Integration Technology Conference

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Autonomous systems for healthcare and sports applications benefit largely from a small form factor, as minute dimensions result in maximal mobility and comfort. By embedding a commercially available IC in a flexible circuit board (FCB), the overall size of a system can be reduced. This work presents the process of thinning and packaging an IC in a flexible interposer, and the embedding thereof in a FCB. To illustrate the potential of this technology towards miniaturization, a commercially available RF transceiver ZL70102 was packaged and embedded, thus realizing a volume reduction of 60%. I ntroductionResearch in the field of healthcare and sport monitoring tends to focus on the development of smart devices, where the output of multiple sensors is combined with the functionality of a microcontroller, memory and an RF transceiver for wireless communication to a base station or other nodes in the Body Area Network (BAN). The picture is often completed with a battery or energy harvester, thus providing an autonomous solution which enables the user or patient to monitor his/her health with a higher effectiveness and precision. Conventional technology often results in bulky solutions, and miniaturization of these systems only seems to be possible at the expense of functionality, autonomy and comfort.This paper reports on the development of a versatile packaging technology which allows integrating commercially available ICs into a miniature package by embedding the chip into a flexible circuit board (FCB). This action then allows rerouting the passives on top of the IC, which results in a system with a smaller form factor, breaking the boundaries imposed by SMD technology and fine pitch packages.

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High Yield Embedding of 30μm Thin Chips in a Flexible PCB using a Photopatternable Polyimide based Ultra-Thin Chip Package (UTCP)

Cited by 5 publications

References 7 publications

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

High-Yield Fabrication Process for 3D-Stacked Ultrathin Chip Packages Using Photo-Definable Polyimide and Symmetry in Packages

Embedding of Ultrathin Chips in Highly Flexible, Photosensitive Solder Mask Resist

Embedding thinned chips in flexible PCBs

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