High Voltage Stress Induced in Transparent Polycrystalline Diamond Field-Effect Transistor and Enhanced Endurance Using Thick Al<sub>2</sub>O<sub>3</sub>Passivation Layer

Syamsul, Mohd; Kitabayashi, Y.; Kudo, Tetsuichi; Matsumura, Daiju; Kawarada, Hiroshi

doi:10.1109/led.2017.2685081

Cited by 25 publications

(7 citation statements)

References 24 publications

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“…Device A has a breakdown voltage that is higher than 145 V. For the drain-gate distance of 2 µm, the average electric field strength is over 0.72 MV/cm. Compared with the results of a C-H diamond MOSFET fabricated on a polycrystalline diamond sample with a thick Al 2 O 3 passivation layer by Syamsul et al [22], our devices show higher breakdown field strength, and the values are comparable to a device on a single crystalline diamond sample (0.8∼0.9 MV/cm) [10], indicating the good device fabrication processes and high quality of the Al 2 O 3 dielectrics in our devices. Meanwhile, the breakdown voltage of device B is 27 V. This breakdown could occur in the 25-nm-thick Al 2 O 3 film between the drain and the gate, and thus the evaluated average electric field strength reaches 10.8 MV/cm.…”

Section: Resultssupporting

confidence: 55%

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric

Ren

et al. 2020

IEEE Access

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C-H diamond metal-oxide-semiconductor field effect transistors with different structures were fabricated on the same polycrystalline diamond plate. Devices A and B with 25-nm-thick high temperature (300 • C) atomic layer deposition grown Al 2 O 3 dielectric have the same source-to-drain distance of 6 µm and different gate length of 2 µm and 6 µm, respectively. Both devices show ultra-high on/off ratio of over 10 10 and ultra-low gate leakage of below 10 −10 A and continuous measurement stability. Device B with the source/drain-channel interspaces eliminated has achieved an on resistance of 46.20 •mm, which is record low in the reported 6-µm H-diamond MOSFETs with the gate dielectric prepared at high temperature (≥ 300 • C). Meanwhile, device B shows larger drain current in a large portion of the linear region at V GS = −6 V, and a just slightly smaller I Dmax compared with device A though its L G is three times of that of device A. A simple model of I D was used to explain the physics behind this phenomenon. In addition, the breakdown voltage is 145 V for device A and 27 V for device B, corresponding to the average breakdown field of about 0.72 MV/cm and 10.8 MV/cm, respectively.

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Section: Resultssupporting

confidence: 55%

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric

Ren

et al. 2020

IEEE Access

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“…In Fig. 4, the electrical characteristics are benchmarked against other HTDTs in the literature, based on monocrystalline diamond [5], [12], [21], [22], polycrystalline diamond [4], [23], and polycrystalline diamond on SiC [6]. This work represents the first HTDT on GaN-on-Si substrates, demonstrating similar high power device figure of merit (BFOM = 2.5 MW/cm 2 ) compared with other HTDTs on polycrystalline and even some on monocrystalline diamond.…”

Section: Resultsmentioning

confidence: 77%

H-Terminated Polycrystalline Diamond p-Channel Transistors on GaN-on-Silicon

Soleimanzadeh

Naamoun²,

Khadar

et al. 2020

IEEE Electron Device Lett.

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In many semiconductor technologies, including GaN, the lack of p-channel devices is a major obstacle for complementary operations. Here, we demonstrate highperformance polycrystalline diamond p-channel transistors on GaN-on-Si. Following the optimization of the microwave-plasma chemical-vapor-deposition of diamond on GaN, the polycrystalline layer was hydrogenated to form a 2D hole-gas at the surface, acting as p-channel. Relying on a rather simple fabrication process, these devices exhibited excellent electrical and thermal performances with on-off ratio of 10 9 , breakdown voltage of 400 V, specific on-resistance of 84 mΩ•cm 2 , and thermal conductivities higher than 900 W/m•K. The presented hetero-integration technology provides a promising platform for future complementary logic operations, gate drivers, complementary power switch applications such as integrated power inverters and converters, simultaneously serving as a very efficient thermal management solution in high power density applications.

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“…Besides, the relatively poor quality of the heteroepitaxial diamond, with the dislocation density of around 10 8 cm −2 [54], would also lead to the low μ FE of the heteroepitaxial diamond MOSFET. It should be noted that the channel mobility of the inversion-type p-channel MOSFET on the heteroepitaxial diamond is lower than those of the H-terminated diamond MOSFETs or MISFETs fabricated on polycrystalline or heteroepitaxial diamonds [48,[60][61][62]. One possible reason is due to the uneven quality and resultant different surface roughnesses of the heteroepitaxial or polycrystalline diamond films formed by this work and others.…”

Section: Inversion-type P-channel Mosfets On Heteroepitaxial Diamond Substratesmentioning

confidence: 74%

Inversion-type p-channel diamond MOSFET issues

Zhang

Matsumoto

Yamasaki

et al. 2021

Journal of Materials Research

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This article reviews the state of the art in inversion-type p-channel diamond MOSFETs. We successfully developed the world’s first inversion-channel homoepitaxial and heteroepitaxial diamond MOSFETs. We investigated the dependence of phosphorus concentration (NP) of the n-type body on field-effect mobility (μFE) and interface state density (Dit) for the inversion channel homoepitaxial diamond MOSFETs. With regard to the electrical properties of both the homoepitaxial and heteroepitaxial diamond MOSFETs, they suffer from low μFE and one main reason is high Dit. To improve the interface quality, we proposed a novel technique to form OH-termination by using H-diamond followed by wet annealing, instead of the previous OH-termination formed on O-diamond. We made precise interface characterization for diamond MOS capacitors by using the high-low C–V method and the conductance method, providing further insights into the trap properties at Al2O3/diamond interface, which would be beneficial for performance enhancement of the inversion-type p-channel diamond MOSFETs. Graphic abstract

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High Voltage Stress Induced in Transparent Polycrystalline Diamond Field-Effect Transistor and Enhanced Endurance Using Thick Al₂O₃Passivation Layer

Cited by 25 publications

References 24 publications

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric

H-Terminated Polycrystalline Diamond p-Channel Transistors on GaN-on-Silicon

Inversion-type p-channel diamond MOSFET issues

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High Voltage Stress Induced in Transparent Polycrystalline Diamond Field-Effect Transistor and Enhanced Endurance Using Thick Al2O3Passivation Layer

Cited by 25 publications

References 24 publications

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al2O3Gate Dielectric

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al2O3Gate Dielectric

H-Terminated Polycrystalline Diamond p-Channel Transistors on GaN-on-Silicon

Inversion-type p-channel diamond MOSFET issues

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Product

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High Voltage Stress Induced in Transparent Polycrystalline Diamond Field-Effect Transistor and Enhanced Endurance Using Thick Al₂O₃Passivation Layer

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric

Low On-Resistance H-Diamond MOSFETs With 300 °C ALD-Al₂O₃Gate Dielectric