High-voltage DIMOS driver circuit

Pomper, M.; Leipold, L.; Tihanyi, J.; Longo, H.-E.

doi:10.1109/jssc.1980.1051394

Cited by 9 publications

(1 citation statement)

References 4 publications

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“…In order to integrate high-voltage MOS devices and logic circuits on the same chip, two different basic approaches have been demonstrated: one uses a vertical MOS structure (l), the other uses a horizontal structure (2)(3)(4). In this paper, the authors describe an advanced high-voltage MOS-IC technology that uses a horizontal device structure with a silicon-gate isoplanar process that is compatible with present NMOS-LSI technology.…”

Section: Introductionmentioning

confidence: 99%

Process and device design of a 1000-volt MOS IC

Yamaguchi

Morimoto

1981

1981 International Electron Devices Meeting

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High-voltage MOS devices and NMOS logic circuits have been integrated on the same chip by using a silicon-gate isoplanar process that is compatible with present NMOS-LSI technology.The electrical characteristics of a high-voltage MOS device are modeled and characterized in terms of channel length, drift-layer length, drift-layer ion dose, and extended-source field-plate effect. The device structure and the process parameters are optimized to obtain maximum drain saturation current with a low on-resistance and a drain breakdown of 1000 volts. The optimized high-voltage MOS device can perform at a saturation drain current as high as 84 mA with on-resistance as low as 300 n within an area of 520 pm x 1320 pm while maintaining a drain breakdown of 1000 volts and drain leakage current less than 30 nA.

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Section: Introductionmentioning

confidence: 99%

Process and device design of a 1000-volt MOS IC

Yamaguchi

Morimoto

1981

1981 International Electron Devices Meeting

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Active Matrix Addressed Displays

Kaneko¹,

Demus²,

Goodby

et al. 1998

Handbook of Liquid Crystals Set

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Nematic Liquid Crystals: Applications, Section 3.2

Kaneko¹,

Demus²,

Goodby

et al. 1998

Handbook of Liquid Crystals

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Matrix Address [ 1 -201The simplest way to overcome the scanning limitations encountered in passive matrix liquid crystal display panels is to provide one or more nonlinear circuit elements at the intersection of the gate and data electrodes, thus producing sharper threshold characteristics for each pixel. Presently, diodes and intrinsic nonlinear devices are used for these nonlinear circuit elements.In the two-branch configuration of Fig. 2, the liquid crystal pixel is charged when the diode is forward biased during the select period. Leakage from the pixel through the diode during the nonselected period is prevented by keeping both diodes reverse biased. One disadvantage of this configuration is that areas of the gate electrode buses are large on the substrate, and as a consequence, the pixel aperture ratio decreases greatly as compared with other diode addressing configurations.

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High-voltage DIMOS driver circuit

Cited by 9 publications

References 4 publications

Process and device design of a 1000-volt MOS IC

Process and device design of a 1000-volt MOS IC

Active Matrix Addressed Displays

Nematic Liquid Crystals: Applications, Section 3.2

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