High-throughput low-cost VLSI architecture for AVC/H.264 CAVLC decoding

A Novel Low-Cost High-Throughput CAVLC Decoder for H.264/AVC

“…[2], [6], [8]. CAVLC decoding methods using LUTs require a couple of look-up table access, sequentially.…”

“…And Yu and Lee proposed multi-symbol run before decoder to decode a couple of run before symbol in ref. [8], [15]. Yu proposed multi-symbol run before by using large memory that contains 86 elements and each element consists of contiguous two symbols.…”

“…2. The proposed CAVLC decoder shares a leading zeros detector which was existent in level, run before, and coeff token sub-decoder, separately, in the previous works [6]- [8]. The proposed CAVLC decoder reduces H/W cost and allows other sub-decoders to use the values of leading zeros in each decoding process.…”

“…Because of duplicated elements, there are some inefficient uses of proposed LUTs shown in Table 1∼4 but we can reduce look-up table size about 30 % because symbol length information of each element is not contained compared with ref. [8]. First number of each element in the table is total coefficient and the second one is the number of trailing ones.…”

“…Multi-symbol run before decoder is studied in various literatures based on the feature of run before symbol [8], [15]. But there are huge increases of H/W size in contrast with its enhanced throughput.…”