High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator

Design of Xilinx Zynq UltraScale+ MPSoC special power module

“…For the DC input power supply, the output voltage can't be directly connected to the IC, but also need to add some circuits to improve the quality of the power supply and power protection. The four most important conditions should be met: overcurrent protection, overvoltage protection, anti-reaction [4] , and filtering. The circuit design is shown in Figure 4: F1 is a self-restoring fuse, which is powered off when the current is too large to realize overcurrent protection.…”

Modern Video Coding: Methods, Challenges and Systems

“…Merge mode allows a block to reuse the MVs from neighboring blocks. There are several hardware implementations targeting the HEVC ME in the literature, like [34], [35], [36], [37], [38] and [11].…”

“…In addition, novel and complex modes are tested, such as the Affine/Warped mode in VVC and AV1. Works targeting dedicated hardware designs for the inter prediction explore several techniques to obtain gains in coding efficiency, energy consumption, required area, high throughput and memory bandwidth, such as: multiplierless implementations [11], [12], [13], [37], [39], [40], [38]; approximate computing solutions [37], [13], [42]; reuse of common subexpression [11], [39], [12]; parallelism exploration [11], [37], [39], [40]; and hardware reconfigurability [41].…”

“…On the other hand, some academic works detail the proposed solutions, but most of them do not support all the encoder or decoder tools. Most of them are only focused on one of these tools, like the works [11], [12], [13], [14], which employ low-power techniques, and [15], [16], [13], which use approximate computing.…”