High-speed and reduced-area modular adder structures for RNS

On building general modular adders from standard binary arithmetic components

“…A recent realization of Eqn. 1 [2] is similar to that of [16], but postpones the selection operation until the actual sum results are available, thus providing advantages in area and time. The aforementioned designs all entail the undesirable fan-out of n owing to the fact that one selection signal controls n multiplexors.…”

“…Moduli of the form 2 δ are popular due to ease of designing fast adders, especially for δ 1 [14] and δ 3 [16], where addition circuits with only one n-bit adder in the critical path are possible. However, substantial effort may be needed for designing multiple arithmetic units for other δ (e.g., 5, 7, for n = 4) from scratch, including the laborintensive and error-prone optimization process for high speed and power economy in each case [2].…”

“…To compare the area and delay of the proposed adder with the latest relevant work [2], and with the designs in [17] and [16], we begin with the same gate-level evaluation of area and delay used in the references: we count each basic gate as having unit area and delay, with XOR gates counting double. The results are reported in Table III, assuming that, as in the best design of [2], the main n-bit adder is of the Kogge-Stone [20] parallel prefix (KSPP) variety.…”

“…For a more reliable evaluation, we described the designs in [17], [16], and [2], along with our proposed adder, in VHDL code, validated them for , δ ∈ 5, 15 , 5, 3 , 8, 125 , 8, 65 , and used the codes as inputs to a 0.13μm CMOS technology synthesis process via the Synopsys design compiler. Four design points are assessed in Table V.…”

Pipelined Two-Operand Modular Adders

“…Zimmermann [22] introduced modulo (2 n  1) adders based on parallel prefix-architecture (PPA). Hiasat [23] proposed a TOMA with the reduced area based on the carry-look-ahead (CLA) adder. Also a novel delay-powerarea-efficient approach to the TOMA design was given by Patel et al [24].…”