High-resolution A/D conversion in MOS/LSI

This paper presents the design and test of a low power analog-to-digital converter (ADC) implemented in a commercial 0.25 m CMOS technology. The circuit has been developed to serve as a building block in multichannel data acquisition systems for high energy physics (HEP) applications. Therefore, medium resolution (10 bits), very low power consumption, and high modularity are the key features of the design. In HEP experiments, the resistance of the electronics to the ionizing radiation is often a primary issue. Hence, the ADC has been laid out using a radiation-tolerant approach. The test results show that the chip operates as a full 10-bit converter up to a clock frequency of 30 MHz. No degradation in performance has been measured after a total dose of 10 Mrd (SiO 2 ).Index Terms-Analog-to-digital conversion, deep submicron.

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“…The sub-DAC can be implemented using either resistors [4] or another array of binary weighted capacitors. This second option is shown in Fig.…”

Section: A Dac Architecturementioning

confidence: 99%

A low-power 10-bit ADC in a 0.25-/spl mu/m CMOS: design considerations and test results

Rivetti

Anelli²,

Anghinolfi³

et al. 2001

IEEE Trans. Nucl. Sci.

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“…State-of-the-art capacitor-array converters are capable of reaching 10-11-bit linearities. A capacitive-resistive structure has been proposed, with a programmed automatic calibration routine, to pro duce an excellent linearity and be able to work to resolutions above 14 bits [12], [14]. (3) Speed: The active comparator used to make the bit decisions must operate with the 0.5 lsb over drive within the assigned time.…”

Section: Analog-to-digitalmentioning

confidence: 99%

Digital transmission in the subscriber loop

Guinea¹,

Stacey²,

Batruni³

1986

IEEE Circuits Devices Mag.

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Major developments by the telephone industry have launched a world wide effort to convert the network into an integrated services digital network (ISDN). This paper explores the digital transmission issues as they pertain to the subscriber two-wire loop, and the large-scale-integrated (LSI) circuit functions, analog and digital, required to extend digital capa bilities to the subscribers' premises in a cost-effective manner.

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“…Modem designs often also include multiple-tap resistive voltage-divider strings to assure monotonicity [62], [63]. A typical example, taken from [63], is shown in Fig. 39.…”

Section: Dac (Mdac) If VI Is An Analog Input Voltagementioning

confidence: 99%