High-radix digit serial division

Bashagha, A. E.; Ibrahim, M.K.

doi:10.1049/ip-cds:19960707

Cited by 5 publications

(2 citation statements)

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“…Despite these advantages, the digit serial algorithms are still slow. Recently, the authors proposed an area-time e cient digit serial division algorithm based on radix-2 n arithmetic (Bashagha and Ibrahim 1996), where K quotient bits are generated every m K 1 cycles instead of mK cycles as in the conventional one (Parhi 1991). It was shown that such approach will speed up the digit serial architecture as well as cutting down the silicon area requirements.…”

Section: Introductionmentioning

confidence: 98%

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Area-time efficient two's complement square rooting

Ibrahim¹,

Bashagha²

1999

International Journal of Electronics

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The conventional two's complement digit serial square root structure processes an n-bit digit every clock cycle. Therefore, it generates one bit of the N-bit square root every m cycles, where m N/n. Instead of generating Kbits every mKcycles, these bits can be generated in m K 1 cycles only by overlapping K steps of the conventional digit serial algorithm. The new two's complement structure is a tree representation of the conventional one and therefore, it can be considered as a high radix approach of the digit serial structure. It will be shown that the proposed architecture is faster and might be cheaper than the conventional digit serial one. Moreover, it is the ® rst digit serial square root structure which is cheaper and faster than the two's complement binary bit parallel one.

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Section: Introductionmentioning

confidence: 98%

“…This paper generalizes the division approach of Bashagha and Ibrahim (1996) to the square rooting operation. The proposed algorithm can be considered as a tree implementation of the original digit serial one Bashagha and Ibrahim (1994).…”

Section: Introductionmentioning

confidence: 99%