2002
DOI: 10.4028/www.scientific.net/msf.389-393.23
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High Quality SiC Substrates for Semiconductor Devices: From Research to Industrial Production

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Cited by 44 publications
(5 citation statements)
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“…7) which is compatible with a uniform nitrogen profile along the epitaxial layer as observed by SIMS on standard samples. The layer deposited on the third wafer previously doped at 10 15 at/cm 3 exhibits a doping level in the range 10 17 -3 Â 10 17 at/cm 3 is etched at the same time as Si and C on the surface of the two first wafers and that it is significantly incorporated in the last wafer deposit. The doping level measured on the third wafer is roughly ten times lower than the first two wafers.…”
Section: Doping Experimentsmentioning
confidence: 99%
See 1 more Smart Citation
“…7) which is compatible with a uniform nitrogen profile along the epitaxial layer as observed by SIMS on standard samples. The layer deposited on the third wafer previously doped at 10 15 at/cm 3 exhibits a doping level in the range 10 17 -3 Â 10 17 at/cm 3 is etched at the same time as Si and C on the surface of the two first wafers and that it is significantly incorporated in the last wafer deposit. The doping level measured on the third wafer is roughly ten times lower than the first two wafers.…”
Section: Doping Experimentsmentioning
confidence: 99%
“…Wide band gap materials such as silicon carbide and III-nitrides have properties which make them attractive for high power, high frequency, high temperature devices [1,2]. The increasing interest in SiC is related to the availability of commercial substrates of ever increasing diameter and quality [3] the development of epitaxial growth techniques [4]. For instance, one of the main obstacles to reach a larger production for SiC devices is to control the residual defects in the bulk material and to understand how they affect the device behavior [5,6].…”
Section: Introductionmentioning
confidence: 99%
“…Various physical characterization techniques have shown that structural defects would be created in the epilayers during the operation. Encouragingly, Cree researchers have reported [13] that a process modification, which suppresses this degradation phenomenon, has been found but they have not released any details. Tsunenobu Kimoto et al have reported 15 kV SiC PiN diodes with various junction terminal technologies [14].…”
Section: Silicon Carbide Pin Diodes (Pin)mentioning
confidence: 99%
“…This is reflected in the attainment of micropipe densities as low as 0.9 cm −2 for a 2-inch 4H (N-doped) wafer and 22 cm −2 for a 3-inch 4H (N-doped) wafer [62]. The density of the threading dislocations is commonly determined by using hot KOH etching and is in the range of 10 3 -10 4 cm −2 [63].…”
Section: Growth-related Defectsmentioning
confidence: 99%