Proceedings of the 2018 International Symposium on Code Generation and Optimization - CGO 2018 2018
DOI: 10.1145/3179541.3168824
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High performance stencil code generation with Lift

Abstract: Stencil computations are widely used from physical simulations to machine-learning. They are embarrassingly parallel and perfectly fit modern hardware such as Graphic Processing Units. Although stencil computations have been extensively studied, optimizing them for increasingly diverse hardware remains challenging. Domain Specific Languages (DSLs) have raised the programming abstraction and offer good performance. However, this places the burden on DSL implementers who have to write almost full-fledged paralle… Show more

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Cited by 22 publications
(28 citation statements)
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“…The select_1d rule is a duplicate of the reduce rule. The shift nesting rewrite rule is similar to the stencils in Lift [18]. As such, it is also simple to see that the nesting rewrite rules preserve the isomorphism.…”
Section: Rewrite Rules Preserve Semanticsmentioning
confidence: 97%
“…The select_1d rule is a duplicate of the reduce rule. The shift nesting rewrite rule is similar to the stencils in Lift [18]. As such, it is also simple to see that the nesting rewrite rules preserve the isomorphism.…”
Section: Rewrite Rules Preserve Semanticsmentioning
confidence: 97%
“…optimising for performance [24,30] or generating optimised code as part of a domain-specific language (DSL) [23]. Moreover, since patterns are architecture-agnostic, patterns have been similarly implemented for multiple architectures [26,34]. SPar [25] is a C??…”
Section: Related Workmentioning
confidence: 99%
“…optimising for performance [26,34] or generating optimised code as part of a DSL [25]. Moreover, since patterns are architecture-agnostic, patterns have been similarly implemented for multiple architectures [28,41]. This introduces a level of specialisation, and the possibility of choice between pattern implementations.…”
Section: Related Workmentioning
confidence: 99%