High-Performance Single-Crystal-Like Strained-Silicon Nanowire Thin-Film Transistors via Continuous-Wave Laser Crystallization

Chou, Chang‐Pin; Chan, Wei-Sheng; Lee, I-Che; Wang, Chao-Lung; Wu, Chunyu; Yang, Po‐Yu; Liao, Chan; Wang, Kuangyu; Cheng, Huang–Chung

doi:10.1109/led.2015.2405760

Cited by 11 publications

(15 citation statements)

References 11 publications

(15 reference statements)

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“…A high thermal biaxial tensile stress of 1112 MPa in the poly-Si was calculated using the equation relating Δω and stress (σ). 23,24) These results indicate that ultrahigh-mobility TFTs are mainly brought about by large Si(100) crystal grains with high biaxial tensile strain.…”

Section: Resultsmentioning

confidence: 91%

Formation of (100)-oriented large polycrystalline silicon thin films with multiline beam continuous-wave laser lateral crystallization

Nguyen

Hiraiwa

Koganezawa

et al. 2018

Jpn. J. Appl. Phys.

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Low-temperature crystallization to (100)-oriented polycrystalline silicon (poly-Si) thin films is a key requirement for high-performance low-temperature poly-Si thin-film transistors (LTPS-TFTs). Biaxially (100)-oriented poly-Si thin films were formed by multiline beam continuous-wave laser lateral crystallization in single scans. By overlapping scanning, the (100) preferential orientation was stable and (100) silicon crystals were developed over a large area. The crystallinities of the poly-Si films were precisely characterized, especially by two-dimensional X-ray diffraction. It was found that the poly-Si thin films predominantly had (100)-surface-oriented crystals. The crystallinity of the laser-crystallized poly-Si films was dependent on the scanning speed and overlapping condition. The (100) poly-Si films were formed at scanning speeds below the threshold for lateral-crystallized silicon.

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Section: Resultsmentioning

confidence: 91%

Formation of (100)-oriented large polycrystalline silicon thin films with multiline beam continuous-wave laser lateral crystallization

Nguyen

Hiraiwa

Koganezawa

et al. 2018

Jpn. J. Appl. Phys.

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“…It has become an integral part of the CMOS process, especially for chips intended for RF applications [3]. Device structures and implementations of process for strained Si MOSFETs have been the focus of intense research in recent years [4].However, equivalent circuits of strained Si for circuit simulators are not yet to be investigated in detail.…”

Section: Introductionmentioning

confidence: 99%

Equivalent Circuit Models for Strained Si NMOSFET Using Verilog-A

Wang¹,

Zhou²

2018

dtcse

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Abstract. Equivalent circuit models for strained Si NMOSFET at DC and AC working conditions are investigated in this article. The intrinsic region, source/drain parasitic regions, and substrate parasitic resistance are proposed respectively. The model admits analytical solution using the quasi-two-dimensional analysis and coherent smoothing functions, a unified drain current model is presented. We also present a unified charge model with the charge as the state variable. Model parameters are extracted from the experimental results by software. Furthermore, simulations for strained Si NMOSFETs are realized using Verilog-A.

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“…4,5) Several crystallization technologies have been proposed to increase the poly-Si grain size to improve the performance of LTPS TFTs. Various crystallization technologies, including solid-phase crystallization, 6,7) metal-induced lateral crystallization, 8,9) excimer laser crystallization (ELC), [10][11][12][13][14] and continuouswave laser crystallization (CLC), [15][16][17][18][19][20][21][22][23][24][25][26][27] have been proposed to improve the crystallinity of polycrystalline-silicon (poly-Si) thin films. Compared with poly-Si obtained by other crystallization technologies, lateral-crystallized poly-Si obtained by CLC affords optimal crystallinity.…”

Section: Introductionmentioning

confidence: 99%

Effects of a capping oxide layer on polycrystalline-silicon thin-film transistors fabricated by continuous-wave laser crystallization

Chou

et al. 2018

Jpn. J. Appl. Phys.

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A tetraethyl-orthosilicate (TEOS) capping oxide was deposited by low-pressure chemical vapor deposition (LPCVD) on a 200-nm-thick amorphous Si (a-Si) film as a heat reservoir to improve the crystallinity and surface roughness of polycrystalline silicon (poly-Si) formed by continuous-wave laser crystallization (CLC). The effects of four thicknesses of the capping oxide layer to satisfy an antireflection condition, namely, 90, 270, 450, and 630 nm, were investigated. The largest poly-Si grain size of 2.5 × 20 µm2 could be achieved using a capping oxide layer with an optimal thickness of 450 nm. Moreover, poly-Si nanorod (NR) thin-film transistors (TFTs) fabricated using the aforementioned technique exhibited a superior electron field-effect mobility of 1093.3 cm2 V−1 s−1 and an on/off current ratio of 2.53 × 109.

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High-Performance Single-Crystal-Like Strained-Silicon Nanowire Thin-Film Transistors via Continuous-Wave Laser Crystallization

Cited by 11 publications

References 11 publications

Formation of (100)-oriented large polycrystalline silicon thin films with multiline beam continuous-wave laser lateral crystallization

Formation of (100)-oriented large polycrystalline silicon thin films with multiline beam continuous-wave laser lateral crystallization

Equivalent Circuit Models for Strained Si NMOSFET Using Verilog-A

Effects of a capping oxide layer on polycrystalline-silicon thin-film transistors fabricated by continuous-wave laser crystallization

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