High-performance parallel computing for next-generation holographic imaging

Sugie, Toshiharu; Akamatsu, Takanori; Nishitsuji, Takashi; Hirayama, Ryuji; Masuda, Nobuyuki; Nakayama, Hirotaka; Ichihashi, Yasuyuki; Shiraki, Atsushi; Oikawa, Minoru; Tsuji, Naoki; Endo, Yutaka; Kakue, Takashi; Shimobaba, Tomoyoshi; Ito, Tomoyoshi

doi:10.1038/s41928-018-0057-5

Cited by 92 publications

(61 citation statements)

References 35 publications

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“…Generally, depending on the level of hardware complexity and the use of IP cores, the development time might vary. For example, reported by Sugie et al, 93 the group took over 3 years to develop and implement their algorithms into a custom-made bespoke FPGA platform consisting of eight high-end FPGA chips. The average development time for a project based on FPGA hardware implementations will typically be significantly longer than an equivalent CPU or GPU project.…”

Section: Development Time Using Fpgasmentioning

confidence: 99%

“…86,[104][105][106] The later four generations of devices consist of large-scale FPGA chips embedded on delicate custom printed circuit boards. 46,50,93,96,100 The latest product within this line of work is HORN-8, which comprises seven powerful FPGA chips for calculation and one FPGA chip for communication. As reported in Refs.…”

Section: Advantages and Disadvantages Of Using Fpgasmentioning

confidence: 99%

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Hardware implementations of computer-generated holography: a review

et al. 2020

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Computer-generated holography (CGH) is a technique to generate holographic interference patterns. One of the major issues related to computer hologram generation is the massive computational power required. Hardware accelerators are used to accelerate this process. Previous publications targeting hardware platforms lack performance comparisons between different architectures and do not provide enough information for the evaluation of the suitability of recent hardware platforms for CGH algorithms. We aim to address these limitations and present a comprehensive review of CGH-related hardware implementations.

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Section: Development Time Using Fpgasmentioning

confidence: 99%

Section: Advantages and Disadvantages Of Using Fpgasmentioning

confidence: 99%

Hardware implementations of computer-generated holography: a review

et al. 2020

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“…The recurrence-relation algorithm was adopted by HORN system, and CGH calculations were successfully obtained by implementing a pipeline structure with parallel computers, such as field-programmable gate arrays. [14][15][16][17] The latest version of the HORN system, the eight-board HORN-8 cluster, was used to accelerate the CGH calculations by more than 1000 times compared to the speed achieved with the use of a central-processing unit (CPU), making optimal use of four cores. 17 A patch-model algorithm 18,19 also exploits the recurrence relations between neighboring pixels.…”

Section: Review Of Real-time Reconstruction Techniques For Aerial-promentioning

confidence: 99%

“…[14][15][16][17] The latest version of the HORN system, the eight-board HORN-8 cluster, was used to accelerate the CGH calculations by more than 1000 times compared to the speed achieved with the use of a central-processing unit (CPU), making optimal use of four cores. 17 A patch-model algorithm 18,19 also exploits the recurrence relations between neighboring pixels. Although the patchmodel algorithm can be used to effectively accelerate the CGH calculations when there is a large number of pointlight sources, the error caused by approximation becomes large when the distance between a 3-D object and the CGH plane is large.…”

Section: Review Of Real-time Reconstruction Techniques For Aerial-promentioning

confidence: 99%

“…For example, our research group aims to create a chip dedicated for electroholography to upgrade the HORN system. 17 Hence, we adopted the point-cloud method in the two real-time electroholographic display systems described herein. The first reduces the computational load required for each CGH, and the second parallelizes the CGH calculations using a GPU instead of the HORN system.…”

Section: Review Of Real-time Reconstruction Techniques For Aerial-promentioning

confidence: 99%

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Review of real-time reconstruction techniques for aerial-projection holographic displays

et al. 2018

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Electroholography enables the projection of three-dimensional (3-D) images using a spatial-light modulator. The extreme computational complexity and load involved in generating a hologram make realtime production of holograms difficult. Many methods have been proposed to overcome this challenge and realize real-time reconstruction of 3-D motion pictures. We review two real-time reconstruction techniques for aerial-projection holographic displays. The first reduces the computational load required for a hologram by using an image-type computer-generated hologram (CGH) because an image-type CGH is generated from a 3-D object that is located on or close to the hologram plane. The other technique parallelizes CGH calculation via a graphics processing unit by exploiting the independence of each pixel in the holographic plane. © The Authors.Published by SPIE under a Creative Commons Attribution 3.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.

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Parallel Photoelectron Storage and Visual Preprocessing Based on Nanowire Defect Engineering for Image Degradation

Li,

Zheng,

et al. 2023

Adv Funct Materials

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The image degradation owing to the absorption and scattering of optical propagation medium makes the non‐visualization and anamorphose in real image. The complex algorithms based on highly integrated hardware can restore degraded image while it causes inefficient serial operation and storage redundancy. One improved strategy is to parallel functional integration in front‐end visual perceptron. Here, a parallel photoelectron storage and visual preprocessing in nanowire perceptron to synchronously achieve image perception, visual memory, and in‐sensor preprocessing are demonstrated. This functional integration is originated from charge‐resolved storage in temporal or frequency domain under optical pulsed excitation due to cascaded defect engineering. The proposed system enhances the peak signal‐to‐noise ratio (PSNR) of degraded image from 152 to 181 dB by feature decompression and also has 7.2% of PSNR improvement by noise filtration. This system is validated to improved train accuracy of back‐end artificial neural network (ANN) by 32.8% and shorten its iteration period by 77.4%.

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High-performance parallel computing for next-generation holographic imaging

Cited by 92 publications

References 35 publications

Hardware implementations of computer-generated holography: a review

Hardware implementations of computer-generated holography: a review

Review of real-time reconstruction techniques for aerial-projection holographic displays

Parallel Photoelectron Storage and Visual Preprocessing Based on Nanowire Defect Engineering for Image Degradation

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