High Performance Gate-First pMISFET with TiN/HfSiON Gate Stacks Fabricated with PVD-Based In-Situ Method

Abstract

We could obtain high performance gate-first pMISFET with TiN/HfSiON gate stacks fabricated with PVD-based in-situ method. High-quality Hf silicate gate dielectrics were formed by utilizing a solid phase interface reaction (SPIR) between a metal Hf layer and an SiO 2 underlayer, and TiN electrodes were continuously grown on the gate dielectrics using a low-damage sputtering system without exposure to air. Sufficiently high effective work function (WF = ~ 4.8eV) of the TiN electrodes was achieved after activation annealing at 1050ºC-spike. The in-situ process was found to be effective to reduce carbon impurity of the gate stacks and we could improve device performance, such as drive current I on , subthreshold swing S-value, and carrier mobility. I on = 350µA/µm at I off = 200pA/µm could be obtained, which was a 13% improvement over ex-situ CVD-TiN on CVD-HfSiON. Moreover, this PVD-based in-situ method with moderate fluorine ion implantation into the substrate would reduce the threshold voltage V th even more without deterioration of I on .