High Moisture Resistant and Reliable Gate Structure Design in High Power pHEMTs for Millimeter-Wave Applications

Surface protection mechanism of insulating films at junctions in compound semiconductor devices

“…9 was also investigated [3]. Figure 10 shows the rate of change of the DC drain current (I ds ) of the pHEMTs under HAST (highly accelerated temperature and humidity stress test) conditions at an ambient temperature of 400 K and relative humidity of 85%.…”

“…Figure 1 shows the cross section of a compound semiconductor device that contains voids, grains, gap spaces and pin holes in the insulating film, and the external stresses like plasma damage, oxidation under a moist environment and junction degradation over an upper temperature limit. To prevent these external stresses from damaging device performance, a catalytic chemical vapor deposition (Cat-CVD) technique has been developed [1] and applied to AlGaN/GaN high electron mobility transistors (HEMTs) [2] and pseudomorphic HEMTs (pHEMTs) [3]. In this report, after reviewing examples of the application of silicon nitride films in semiconductor devices, a molecular orbital calculation is used to clarify the mechanism of moisture resistance of such films, which should aid their design.…”