High-mobility patternable MoS2 percolating nanofilms

Gao, Xiaopeng; Yin, Jun; Bian, Gang; Liu, Haiyang; Wang, Chaopeng; Pang, Xixi; Zhu, Jian

doi:10.1007/s12274-020-3218-6

Cited by 35 publications

(49 citation statements)

References 62 publications

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“…All‐solution‐processed MoS 2 transistors exhibit an n‐type electrical behavior with high spatial uniformity in their field‐effect mobility (μ) and current on/off ratio ( I on / I off ), where the average μ and I on / I off are 8.3 cm 2 V −1 s −1 and 1.6 × 10 6 , respectively (Figure 3b; and Figure S10, Supporting Information). These μ and I on / I off values are higher than most of the previous FETs [ 17a,b,29 ] and even comparable to record high‐performance FETs [ 12,30 ] based on solution‐processed MoS 2 . Notably, our device offers a distinct advantage because the operating gate voltage is much lower compared to the previous solution‐processed MoS 2 FETs due to the high capacitance of HfO 2 nanosheet film.…”

Section: Resultssupporting

confidence: 50%

“…Notably, our device offers a distinct advantage because the operating gate voltage is much lower compared to the previous solution‐processed MoS 2 FETs due to the high capacitance of HfO 2 nanosheet film. [ 12,17a,b,29,30 ] The transistor array is also fabricated using a solution‐processed s‐CNT dispersion as a p‐type semiconductor. Figure 3c illustrates a representative transfer curve of an s‐CNT‐based transistor and the spatial distributions of μ and I on / I off .…”

Section: Resultsmentioning

confidence: 99%

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All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

et al. 2022

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Abstract2D van der Waals (vdW) materials have been considered as potential building blocks for use in fundamental elements of electronic and optoelectronic devices, such as electrodes, channels, and dielectrics, because of their diverse and remarkable electrical properties. Furthermore, two or more building blocks of different electronic types can be stacked vertically to generate vdW heterostructures with desired electrical behaviors. However, such fundamental approaches cannot directly be applied practically because of issues such as precise alignment/positioning and large‐quantity material production. Here, these limitations are overcome and wafer‐scale vdW heterostructures are demonstrated by exploiting the lateral and vertical assembly of solution‐processed 2D vdW materials. The high exfoliation yield of the molecular intercalation‐assisted approach enables the production of micrometer‐sized nanosheets in large quantities and its lateral assembly in a wafer‐scale via vdW interactions. Subsequently, the laterally assembled vdW thin‐films are vertically assembled to demonstrate various electronic device applications, such as transistors and photodetectors. Furthermore, multidimensional vdW heterostructures are demonstrated by integrating 1D carbon nanotubes as a p‐type semiconductor to fabricate p–n diodes and complementary logic gates. Finally, electronic devices are fabricated via inkjet printing as a lithography‐free manner based on the stable nanomaterial dispersions.

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Section: Resultssupporting

confidence: 50%

Section: Resultsmentioning

confidence: 99%

All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

et al. 2022

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“…Sparsely distributed MoS 2 nanosheets are deposited on the Si/SiO 2 substrate by layer-by-layer assembly (see Experimental Section for details). [36] AFM image shows a correlation between the areas and the thicknesses of MoS 2 nanosheets, which indicates that their thicknesses are often 5.0 (±1.3) nm, when their sizes are distributed between 0.4 and 2 µm 2 (Figures 5b,c). Using the SNL method, isolated microscale MoS 2 nanosheets can be identified to fabricate FETs to examine their electronic properties.…”

Section: Resultsmentioning

confidence: 94%

Scalable Submicron Channel Fabrication by Suspended Nanofiber Lithography for Short‐Channel Field‐Effect Transistors

Liu

Yin

Gao

et al. 2021

Adv Funct Materials

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Understanding the effect of short channels on the performance of fieldeffect transistors (FETs) from emerging low-dimensional semiconductors is crucial to estimate their suitability in high-density integrated circuits. To this end, intricate and costly equipment capable of nanoscale photolithography or e-beam lithography is usually required to fabricate FETs with shrinking channel lengths. Here, the authors propose an economical suspended nanofiber lithography technique with short-channel processing capability, and compatibility with modern semiconductor foundries. By combining the merits of the near-field electrohydrodynamic printing of nanofibers and microscale photolithographic process, the authors successfully fabricate short channels with lengths as small as 48 nm via masks of suspended nanofibers, whose diameters are easily tuned by adjusting the printing conditions. This technique is further applied for exploring the performance of short-channel FETs using semiconductors such as single-walled carbon nanotubes or electrochemically-exfoliated MoS 2 . Their performance is comparable to those made from more demanding lithography methods. This economical nanofabrication technique is promising to be applied on a variety of semiconductors for highly integrated fabrication of submicron short-channel device arrays.

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“…On the other hand, the MoS 2 film obtained from sulfurizing 15 cycles of PE-ALD MoO x demonstrates a percolated network [69] of crystallites, as evidenced in Figure 5b. The detection of brighter rings in the SAED pattern also reveals that the film is more crystalline than the 10-cycle case, although the resultant MoS 2 fails to completely cover the entire SiO 2 substrate.…”

Section: Stem Analysis For Ultrathin Mosmentioning

confidence: 99%

Thickness and Morphology Dependent Electrical Properties of ALD‐Synthesized MoS₂FETs

Mahlouji

Verheijen

Zhang

et al. 2021

Adv Elect Materials

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High-mobility patternable MoS2 percolating nanofilms

Cited by 35 publications

References 62 publications

All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

Scalable Submicron Channel Fabrication by Suspended Nanofiber Lithography for Short‐Channel Field‐Effect Transistors

Thickness and Morphology Dependent Electrical Properties of ALD‐Synthesized MoS₂FETs

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High-mobility patternable MoS2 percolating nanofilms

Cited by 35 publications

References 62 publications

All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

All‐Solution‐Processed Van der Waals Heterostructures for Wafer‐Scale Electronics

Scalable Submicron Channel Fabrication by Suspended Nanofiber Lithography for Short‐Channel Field‐Effect Transistors

Thickness and Morphology Dependent Electrical Properties of ALD‐Synthesized MoS2FETs

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Thickness and Morphology Dependent Electrical Properties of ALD‐Synthesized MoS₂FETs