High loop-filter-order ΣΔ-fractional-n frequency synthesizers for use in frequency-hopping-spread-spectrum communication-systems

Abstract

Frequency-hopping-spread-sprectrum wireless digital communication-systems impose stringent requirements on both phase noise and settling time of PLL based frequency synthesizers employed in receivers and transmitters. If a CA-fractional-N-Synthesizer is used either the reference frequency or the loop filter order must therefore he high. We theoretically investigate PLLs of higher order and find that the settling time of a sixth order PLL suitable for operation in a hluetoothtransceiver can be as low as 7ps in spite of a reference frequency of 16MHz.