Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference
DOI: 10.1109/eurdac.1993.410682
|View full text |Cite
|
Sign up to set email alerts
|

High-level modeling using extended timing diagrams - A formalism for the behavioral specification of digital hardware

Abstract: Abstract

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1

Citation Types

0
1
0

Publication Types

Select...
4
1

Relationship

0
5

Authors

Journals

citations
Cited by 12 publications
(1 citation statement)
references
References 9 publications
0
1
0
Order By: Relevance
“…Timing diagram has been used in various fields to describe the timing specifications of hardware signals in IC design, to model the behavior of hardware, and to model the specifications of software [4,5,9]. It is one of the best techniques to describe hardware signals, and is used to express the timing constraints of hardware signals such as propagation time and transient time.…”
Section: Related Workmentioning
confidence: 99%
“…Timing diagram has been used in various fields to describe the timing specifications of hardware signals in IC design, to model the behavior of hardware, and to model the specifications of software [4,5,9]. It is one of the best techniques to describe hardware signals, and is used to express the timing constraints of hardware signals such as propagation time and transient time.…”
Section: Related Workmentioning
confidence: 99%