High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Abstract

Large-scale field-programmable analog array ICs have made analog and analog-digital signal processing techniques accessible to a much wider community. Given this opportunity, we present a framework for considering analog signal processing (ASP) techniques for low-power systems. The core of this paper is the definition of an analog abstraction methodology and the creation of a library of high-level analog computation blocks. By abstracting the analog design, we ensure that users have a similar experience to what they would expect with digital design, thus empowering system-level engineers to take advantage of ASP concepts. The result of this paper is to pull analog computation toward system-level development, comparable with the trend in digital system design over the last 30 years.Index Terms-Analog signal processing (ASP), fieldprogrammable analog array (FPAA), rapid analog prototyping.

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

“…The design tools (and abstractions) [38,39], infrastructure [40] and FPAA ICs [1] developed have reached a stable point, across multiple IC fabrication processes [41], where they are used in educational [40] and research environments. The open-source design tool framework utilizes a graphical, high-level data flow language and automatically compiles, places, routes and programs the configurable IC, as well as macro-modeled simulation of the system (Figure 4).…”

“…Noise modeling for analog computation is an essential aspect of system level simulation required for modeling measured responses. Analog system design tools already are starting to have this modeling [38]. This noise increases the derivatives of the function evaluation, further complicating the digital noise in the resulting system.…”

Voltage-mode ultra-low power four quadrant multiplier using subthreshold PMOS

“…1(b), it can be seen that the drain and source terminals of P1 and P2 are connected to each other and the input voltages V 1 and V 2 control the drain currents which are summed in the diode-connected PMOS [2]. The output voltage of the combiner can be expressed as …”

“…Commonly used in analog computational systems such as modulation, frequency doubling, rectification, and gain amplification, four quadrant multiplier especially focus on low power consumption performance [1,2] for wireless sensor network chip. Driven by the early work of Gilbert which was implemented using BJT [3], many multipliers have been reported specially in CMOS technology based on the current mode and voltage mode topologies.…”

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

“…Moreover, depending on the application, there might be no need for additional A/D conversion [4]. Analog signal processing is already advantageously used for low-power low-frequency applications [22] and is gaining momentum for applications in the millimeterwave frequency range [20].…”