2006
DOI: 10.1093/ietele/e89-c.11.1704
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High Efficiency Open Collector Adaptive Bias SiGe HBT Differential Power Amplifier

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Cited by 7 publications
(7 citation statements)
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“…This cascode topology provides a good deal of isolation between input and output, which improves circuit stability. The design uses two transistors with respective width/length of 1536 m/0.18 m and 3072 m/0.35 m. Two shunted resistors (R 1 ) and capacitors (C 1 ) at the gate-ends improve the stability of the PA, the transistor (M 3 ) in the bias circuit is a diode linearizer that extends the power gain and improves the linearity and PAE [10]. As the input power increases, the V gs of the transistor (M 3 ) compensates the V gs of transistor (M 1 ) that is dropped by the partial coupling of RF power through the coupling component.…”
Section: Power Combining Transformermentioning
confidence: 99%
“…This cascode topology provides a good deal of isolation between input and output, which improves circuit stability. The design uses two transistors with respective width/length of 1536 m/0.18 m and 3072 m/0.35 m. Two shunted resistors (R 1 ) and capacitors (C 1 ) at the gate-ends improve the stability of the PA, the transistor (M 3 ) in the bias circuit is a diode linearizer that extends the power gain and improves the linearity and PAE [10]. As the input power increases, the V gs of the transistor (M 3 ) compensates the V gs of transistor (M 1 ) that is dropped by the partial coupling of RF power through the coupling component.…”
Section: Power Combining Transformermentioning
confidence: 99%
“…The open collector adaptive linearization technique has been investigated and published in our previous study [9]. The open collector linearizer is comprised of the base-emitter junction diodes HBT 4 (D 1 ) and HBT 5 (D 2 ) with an open collector transistor (HBT 3 ), a drain-gate connected Fig.…”
Section: Adaptive Linearization Techniquementioning
confidence: 99%
“…A simple RC feedback topology was applied to obtain the on-chip input match and necessary power gain. The open collector adaptive linearizer was implemented in the second stage to achieve both high linearity and PAE [9]. Thrity-four power unit-cells were combined in binary with total emitter area of 425.34 lm 2 for the second stage amplifier (HBT 2 ).…”
Section: Unit-cell and Circuit Designmentioning
confidence: 99%
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“…A voltage-controlled variable resistor [4] was used in the variablegain stage for automatic gain control. An open-collector adaptive bias control circuit was realized in power stage to achieve both high linearity and efficiency [5]. This variable-gain power amplifier was then fabricated in standard 0.35-m SiGe BiCMOS technology.…”
Section: Introductionmentioning
confidence: 99%