Proceedings of 1994 IEEE 1st World Conference on Photovoltaic Energy Conversion - WCPEC (A Joint Conference of PVSC, PVSEC and
DOI: 10.1109/wcpec.1994.519952
|View full text |Cite
|
Sign up to set email alerts
|

High-efficiency a-Si/c-Si heterojunction solar cell

Abstract: An aperture-area conversion efficiency of 20.0% (intrinsic efficiency: 21 .O%) has been achieved for a 1 .Ocm2 CZ n-type single crystalline silicon (c-Si) solar cell, by using the "HIT (Heterojunction with Intrinsic Thinlayer)" structure on both sides of the cell. This is the world's highest value for a c-Si solar cell in which the junction is fabricated at a low temperature of below 200 'C.In this paper, the junction fabrication technologies and features of the HIT structure are reviewed. The stability under … Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

3
90
0
1

Publication Types

Select...
9

Relationship

0
9

Authors

Journals

citations
Cited by 99 publications
(94 citation statements)
references
References 16 publications
3
90
0
1
Order By: Relevance
“…The open-circuit voltage V OC is 0.51 V, which is about 0.1 V below the values observed for c-Si based cells with metal back electrodes. 16 of 41% is due to the lateral resistance of the PANI film ͑and the absence of a top metallic grid͒. It is of interest that the light and dark curves cross at about 0.6 V; while such "crossover" is not typical for homojunction c-Si diodes, it has been reported previously for heterojunctions of ͓poly͑3,4-ethylenedioxythiophene͒:poly ͑styrenesulfonate͔͒ ͑PEDOT:PSS͒ on a-Si: H. 6,9 In Fig.…”
mentioning
confidence: 66%
“…The open-circuit voltage V OC is 0.51 V, which is about 0.1 V below the values observed for c-Si based cells with metal back electrodes. 16 of 41% is due to the lateral resistance of the PANI film ͑and the absence of a top metallic grid͒. It is of interest that the light and dark curves cross at about 0.6 V; while such "crossover" is not typical for homojunction c-Si diodes, it has been reported previously for heterojunctions of ͓poly͑3,4-ethylenedioxythiophene͒:poly ͑styrenesulfonate͔͒ ͑PEDOT:PSS͒ on a-Si: H. 6,9 In Fig.…”
mentioning
confidence: 66%
“…For a-Si cells, thin undoped a-SiC:H buffer layers, sometimes graded in carbon content, are inserted between the p-and the i-layer of p/i/n solar cells [7]. Another example is the HIT solar cell manufactured by Sanyo [8]. This cell is a crystalline-Si solar cell where the emitter and collector layers are deposited using a-Si techniques.…”
Section: Use Of "Resistive" Buffer Layers Between the Emitter And Absmentioning
confidence: 99%
“…2͒ for a practical size of 100.4 cm 2 and 17.3% module efficiency 2 in HIT structures on N-type c-Si substrates, leading to industrial production already in 2003. Sanyo has focused on P-a-Si:H/N-c-Si HIT structures, [1][2][3][4][5][6] while European and U.S. groups have studied both P-a-Si:H/N-c-Si and N-a-Si:H/P-c-Si, structures, [7][8][9][10]30 with the maximum efficiency on P-type substrates reaching between 17% and 18%. 7,10,30 Recent studies have focused on the optimization of these devices in order to maximize the conversion efficiency.…”
Section: Introductionmentioning
confidence: 99%
“…4 Their initial double HIT cells ͑where both the emitter and BSF layers are amorphous, and hence have HJs at either end of the c-Si wafer͒ also suffered from low V oc . 5 However, in spite of this drawback, the efficiency ͑͒ was remarkably high, due to very high values of the fill factor ͑FF͒ and short-circuit current density ͑J sc ͒, the latter mainly due to improved light-trapping induced by a textured c-Si surface. In recent editions of their cells.…”
Section: Introductionmentioning
confidence: 99%