High Density Frame Transfer Image Sensor

Beck, G. A.; Collet, M.G.; Gils, J. A. A. van; Klinkhamer, A. J.; Peek, H.L.; Ruis, W. N. J.; Santen, J. G. van; Smit, Thorsten; Vandormael, G. T. J.

doi:10.7567/jjaps.22s1.109

Cited by 12 publications

(3 citation statements)

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“…The integrated image is readout by the means of a dual readout output shift register [4]. The readout scheme involves transferring charge from odd/even pixels into the upper/lower shift registers and clocking both registers in tandem to readout adjacent pixels concurrently.…”

Section: Dual Readout Shift Registersmentioning

confidence: 99%

High-speed dual-output-channel stage-selectable TDI CCD image sensor for high-resolution applications

et al. 1995

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TDI sensors are a proven means of increasing the responsivity in a line scan imaging application. This paper describes the development of a family of high speed 96 stage TDI sensors. The sensor is available in a high resolution 2048 element version. A 512 element part will also be made. The number of TDI stages in the sensor can be selected in blocks of 6, 12, 24, 48, and 96 stages thus providing optimum sensitivity and performance over a wide range of illumination conditions. The device is fabricated using double metal, triple poly, buried channel, NMOS CCD process. The imaging region is 4-phase, 2-poiy for maximum charge storage and optimum MTF. The pixel pitch on the sensor is l3jim. The sensor employs a dual channel, 2-phase, 2-poly output shift register for high speed read-out. This technique enables halving the driving clock frequency thus reducing the power consumption which can be a severe problem at large data rates. Another benefit of dual channels is that each horizontal CCD (HCCD) pixel corresponds to two vertical CCD (VCCD) registers. As a result the charge storage capacity of the HCCD is doubled without having to increase the register width. The developed sensor operates at a combined data rate of up to 40MHz. The maximum line speeds are 32,000 and 14,000 lines/sec for the 5 1 2 and 2048 element parts respectively. Methods to reduce the fixed pattern noise resulting from transfer inefficiencies between the two HCCD channels have been implemented.

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Section: Dual Readout Shift Registersmentioning

confidence: 99%

High-speed dual-output-channel stage-selectable TDI CCD image sensor for high-resolution applications

et al. 1995

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“…The CCD is fabricated in a triple poly-Si n-buried channel process on a n-type substrate with an implanted p-well (1). A micro--photograph of the device is shown in fig, 9.…”

Section: Device Performances and Device Featuresmentioning

confidence: 99%

The Accordion imager: An ultra high density frame transfer CCD

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et al. 1984

1984 International Electron Devices Meeting

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“…These requirements necessitate high density image sensors. For realizing such high density image sensors, using a dual channel horizontal CCD (H-CCD) register scheme(l), (2) is inevitable, in order not only to avoid the necessity for an ultra fine patterning process for H-CCD register electrode fabrication, but also to reduce power consumption in external driving circuits. However, fixed pattern noise (FPN) associated with the charge transfer between two H-CCD registers would appear(3), unless precise care was taken in designing the H-CCD register.…”

Section: Introductionmentioning

confidence: 99%