High-Density and Near-Linear Synaptic Device Based on a Reconfigurable Gated Schottky Diode

Bae, Jong-Ho; Lim, Suhwan; Park, Byung‐Gook; Lee, Jong‐Ho

doi:10.1109/led.2017.2713460

Cited by 49 publications

(42 citation statements)

References 17 publications

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“…9. Among the devices, although the energy can be increased within an order magnitude if the inference time of 10 ns is increased, it is very probable that the QW CTS device in this work can remain in the group of most energy-efficient synaptic devices, with the merit of full Si processing compatibility [23]- [35].…”

Section: Weight Inference and Energy Evaluationmentioning

confidence: 99%

A Quantum-Well Charge-Trap Synaptic Transistor With Highly Linear Weight Tunability

Cho

Roy

et al. 2020

IEEE J. Electron Devices Soc.

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In this work, a novel synaptic transistor has been proposed and analyzed through technology computer-aided design (TCAD) simulation. The proposed device has merits of full-Si processing compatibility, short-and long-term plasticity, high energy efficiency, and linear and symmetric conductance adjustability. The proposed device consists of a quantum-well structure and a charge-trap unit for realizing both short-and long-term memories, respectively. The quantum-well charge-trap synaptic transistor (QW CTS) employs two independent gates to separate inference and weight adjustment operation. An optimally designed and validated QW CTS has demonstrated a highly linear and symmetric weight tunability, with an ultra-low energy consumption of ~1.5 fJ per synaptic event. The QW CTS can be a core element in the hardware-driven Si neuromorphic system.

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Section: Weight Inference and Energy Evaluationmentioning

confidence: 99%

A Quantum-Well Charge-Trap Synaptic Transistor With Highly Linear Weight Tunability

Cho

Roy

et al. 2020

IEEE J. Electron Devices Soc.

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“…By using the stochastic characteristic of neurons in SNNs, the performance of SNNs using the proposed training scheme achieves the performance of ANNs. For the hardware configuration of on-chip training SNN systems, a gated Schottky diode (GSD), which has a saturated current, is fabricated as a synaptic device ( Bae et al, 2017 ; Lim et al, 2019b ). This characteristic greatly improves the reliability of the SNN system by allowing the GSDs to represent accurate weights even if an unexpected voltage drop occurs in the system ( Lim et al, 2019a ).…”

Section: Introductionmentioning

confidence: 99%

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

et al. 2020

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Hardware-based spiking neural networks (SNNs) inspired by a biological nervous system are regarded as an innovative computing system with very low power consumption and massively parallel operation. To train SNNs with supervision, we propose an efficient on-chip training scheme approximating backpropagation algorithm suitable for hardware implementation. We show that the accuracy of the proposed scheme for SNNs is close to that of conventional artificial neural networks (ANNs) by using the stochastic characteristics of neurons. In a hardware configuration, gated Schottky diodes (GSDs) are used as synaptic devices, which have a saturated current with respect to the input voltage. We design the SNN system by using the proposed on-chip training scheme with the GSDs, which can update their conductance in parallel to speed up the overall system. The performance of the on-chip training SNN system is validated through MNIST data set classification based on network size and total time step. The SNN systems achieve accuracy of 97.83% with 1 hidden layer and 98.44% with 4 hidden layers in fully connected neural networks. We then evaluate the effect of non-linearity and asymmetry of conductance response for long-term potentiation (LTP) and long-term depression (LTD) on the performance of the on-chip training SNN system. In addition, the impact of device variations on the performance of the on-chip training SNN system is evaluated.

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“…[ 23,24 ] As for the proof‐of‐concept devices such as photonic devices and Schottky diodes, further investigation is needed. [ 29–31 ]…”

Section: Introductionmentioning

confidence: 99%

Recent Progress on Memristive Convolutional Neural Networks for Edge Intelligence

Qin

Bao

Wang

et al. 2020

Advanced Intelligent Systems

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Recently, deep learning has shown substantial breakthroughs in various fields such as speech recognition, image and video classification, and natural language processing. [1-3] The explosive development of deep learning has promoted the convergence of this field with other disciplines. The progress has benefited from the update and improvement of models and theories in computer science, as well as the advancement of contemporary semiconductor chip technology. However, the limited bandwidth and computing resources of the traditional computer system greatly restrict the running speed when faced with the increasing scale of deep neural networks (DNNs). The traditional von Neumann architecture separates data storage and computing. Frequent and inefficient movement of data between the processor and memory or off-chip storage brings latency and energy consumption issues, while the mismatch between data transmission and data processing becomes a bottleneck in the implementation of deep learning in hardware. Due to the high-bandwidth and highparallelism requirements of deep learning, data-intensive artificial intelligence (AI) applications have been dominated by cloud computing; that is, edge devices act as data-collecting interfaces and pass data to clustered cloud computer centers for computing to achieve deep learning. [4] Such AI applications place high requirements on network bandwidth and latency, and take the privacy leakage issue to users. [5] For example, in areas with poor network conditions, Tesla's AI autonomous driving will become unreliable and even life-threatening. With the popularization of deep learning, the efficient AI applications that can be seen daily are becoming an urgent need. Edge intelligence is a concept relative to cloud intelligence. [6] Edge computing requires real-time intelligence on devices with strict budgets for energy consumption and device area, such as smart watches and drones. It pushes cloud services from the network core to the edge of the network that is closer to Internet-of-things (IoT) devices and data sources, and then builds up an end-to-end network. Physical proximity to the informationgeneration sources is the most crucial characteristic emphasized by edge computing, wherefore high energy efficiency, small size, low latency, and high privacy protection become valued characteristics for edge intelligence. [7-9] With the combination of hardware and AI, devices dedicated for deep learning have emerged. These devices are called neural network accelerators. The combination of a traditional complementary metal-oxide semiconductor (CMOS) and emerging nonvolatile memory provides a considerable wealth of possibilities for AI accelerators. [10-13] The use of memory technology as a synaptic weight matrix storage unit has set a foundation for the hardware implementation of neuromorphic computing systems. In some prominent AI chips, traditional memories have been utilized; for example,

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High-Density and Near-Linear Synaptic Device Based on a Reconfigurable Gated Schottky Diode

Cited by 49 publications

References 17 publications

A Quantum-Well Charge-Trap Synaptic Transistor With Highly Linear Weight Tunability

A Quantum-Well Charge-Trap Synaptic Transistor With Highly Linear Weight Tunability

On-Chip Training Spiking Neural Networks Using Approximated Backpropagation With Analog Synaptic Devices

Recent Progress on Memristive Convolutional Neural Networks for Edge Intelligence

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