High coded data rate and multicodeword WiMAX LDPC decoding on Cell/BE

Abstract

A novel, flexible and scalable parallel LDPC decoding approach for the WiMAX wireless broadband standard (IEEE 802.16e) in the multicore Cell broadband engine architecture is proposed. A multicodeword LDPC decoder performing the simultaneous decoding of 96 codewords is presented. The coded data rate achieved a range of 72-80 Mbit/s, which compares well with VLSI-based decoders and is superior to the maximum coded data rate required by the WiMAX standard performing in worst case conditions. The 8-bit precision arithmetic adopted shows additional advantages over traditional 6-bit precision dedicated VLSI-based solutions, allowing better error floors and BER performance.

Comparison of reweighted message passing algorithms for LDPC decoding

“…Secondly, we reduce the number of iterations to 20, which is a more practical value for hardware implementations [18]. Figs.…”

A novel system with WiMax LDPC-coded OFDM for optical communication

“…The WiMax standard (IEEE 802.16) works in distance below the 10 km range [6]. LDPC codes are linear block codes.…”

Multi-core platforms for signal processing: source and channel coding

“…Binary LDPCs are linear block codes represented by bipartite Tanner graphs that require computationally intensive iterative message passing processing associated with a huge number of arithmetic operations. For the Min-Sum algorithm used here [3], each iteration is computed in two main kernels, for horizontal and vertical processing, associated with the update of all nodes in the Tanner graph. The scheduling mechanism imposes important restrictions on the attempt to parallelize the algorithm.…”

“…shown in figure 2, the adopted parallelizing strategies are implemented following two different approaches: (i) decoding a complete codeword (applying both horizontal and vertical kernels per iteration) for small to medium LDPC codes and exploiting SIMD intrinsic instructions on each SPE [3]; or (ii) due to the limitation imposed by the reduced size of the LS, large codes have to be partially decoded on each SPE. This latter strategy demands heavier data traffic and congestion occurs between the PPE's main memory and the SPE's LS.…”