High aspect ratio quarter-micron electroless copper integrated technology

Shacham‐Diamand, Yosi; Lopatin, S.

doi:10.1016/s0167-9317(97)00096-8

Cited by 51 publications

(29 citation statements)

References 5 publications

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“…Although many researchers study on electrolessly deposited diffusion barrier layers, most of them require an activation seed layer formed by dry process [3][4][5][6] . This study includes a novel wet formation process, i.e.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of the Electroless NiMoB Films as a Diffusion Barrier Layer on the Low-<em>k</em> Substrate

Yoshino¹,

Masuda²,

Wakatsuki³

et al. 2006

ECS Trans.

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Fabrication of electroless NiMoB thin films as a diffusion barrier layer and capping layer for Cu interconnects in ULSI (ultra large scale integrated circuits) with low-k inter level dielectrics were developed. The films containing the Mo were expected to improve the barrier property for Cu diffusion and thermal stability of the films. This study included the novel wet formation process, i.e. we use self-assembled monolayer (SAM) and catalyzing process to obtain the uniform catalyzed surface to initiate the electroless deposition reaction.The deposition rate was strongly dependent on the MoO 3 concentration in the solution. Low concentration (< 0.003 M) of MoO 3 acted as an accelerator. On the other hand, high concentration of MoO 3 inhibited the deposition reaction. Moreover, the addition of Mo beyond 0.01 M completely suppressed the electroless deposition reaction. The content of Mo in the deposit increased as the concentration of MoO 3 in the solution increased. The Mo composition in the film saturated when the MoO 3 concentration was 0.003 M. The resistance of the layer was significantly affected by Mo, Ni and B contents in the film and deposition rate and film morphology. The surface morphology was evaluated by FE-SEM and AFM.Surface roughness depended on the deposition rate. The selective deposition was attained on the Cu line substrate without catalysis process. Thermal stability of the NiMoB film for Cu diffusion was evaluated. The obtained films (Mo concentration = 20 to 25at %) was stable against vacuum annealing under 400°C. IntroductionThe Cu wiring is one of the materials indispensable in electronics devices such as Cu interconnects in ULSI with low-k inter level dielectrics 1-2 . When we use Cu for ULSI wiring, the most important technique is to form capping and diffusion barrier layers, because Cu is easily oxidized and rapidly diffused into the inter level dielectric films, i.e. SiO 2 , SiOC, etc. The capping layers provide Cu with reliability of anti oxidation stability and improve the electromigration resistance. The diffusion barrier layers suppress the intermixing between Cu and inter level dielectric films. Accordingly, development of high reliability of capping and diffusion barrier layer is required to realize the Cu ULSI wiring. Several materials such as TaN, TiN, etc., were developed to meet these requirements. These layers are formed by dry processes in typical Cu ULSI fabrication process. With an increasing degree of integration, however, difficulties have been experienced in forming uniformly thin films over fine and complex patterned structure with high aspect ratio such as dual damascene structure. Chemical vapor deposition (CVD), atomic layer deposition (ALD) and physical vapor deposition (PVD) are expected to overcome this problem, but these process require the special source and chambers. The wet formation processes, such as electroless deposition, offers superior step coverage on fine patterned substrate and relatively simple process when compared to the dry processes.Although ma...

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Section: Introductionmentioning

confidence: 99%

Fabrication of the Electroless NiMoB Films as a Diffusion Barrier Layer on the Low-<em>k</em> Substrate

Yoshino¹,

Masuda²,

Wakatsuki³

et al. 2006

ECS Trans.

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“…10 ShachamDiamand et al have reported a series of studies related to the development of a conformal CoWP capping layer for Cu by electroless deposition. [10][11][12][13][14][15][16] Nickel is a commonly used barrier material between Cu and Au for electronic connectors and solder interconnects. 17 NiP film is another potential candidate.…”

Section: Introductionmentioning

confidence: 99%

Fabrication of potential NiMoP diffusion barrier/seed layers for Cu interconnects via electroless deposition

Wan

Wang

2005

Journal of Elec Materi

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Potential NiMoP barrier/seed layers for Cu interconnects have been successfully formed by electroless deposition on SiO 2 . Four different wet processes were attempted to activate the surface before electroless deposition. Material properties including the crystal structure, deposition rate, composition, and electrical resistivity of NiMoP layers were investigated by atomic force microscopy (AFM), scanning electron microscopy (SEM), Auger electron spectroscopy, x-ray diffraction (XRD), four-point probe, and surface profilometry (Alpha-step). In this study, different compositions of NiMoP films have been obtained. Ni 89 Mo 2 P 9 with nanocrystalline structure has the highest resistivity due to enriched P content, while Ni 88 Mo 9 P 3 has the lowest value among the compositions considered in this study. The seed layer and the barrier layer functions of NiMoP were verified by direct Cu electrodeposition and secondary ion mass spectroscopy (SIMS).

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“…Consequently, copper electroless plating and chemical vapor deposition ͑CVD͒ are the most promising processes for the formation of a seed layer for electroplating. [9][10][11][12][13][14][15] Bottom-up filling of submicrometer features by iodine-catalyzed CVD was reported by Shim et al, 9 Hwang and Lee, 10 and Josell et al, 11 but adhesion between the copper film and the barrier metal layer was poor and the deposition rate was slow. Copper electroless plating, which does not require a sputtered Cu seed layer, is an efficient means of filling high aspect ratio holes and has became increasingly important.…”

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confidence: 97%

“…Copper electroless plating, which does not require a sputtered Cu seed layer, is an efficient means of filling high aspect ratio holes and has became increasingly important. [12][13][14][15] However, when the hole diameter is less than 70 nm, filling the highaspect-via-hole with normal electroless plating is difficult.…”

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Bottom-Up Fill for Submicrometer Copper Via Holes of ULSIs by Electroless Plating

Wang

Yaegashi

Sakaue

et al. 2004

J. Electrochem. Soc.

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The bottom-up fill of copper in fine via holes is reported in electroless copper plating with the addition of bis͑3-sulfopropyl͒ disulfide ͑SPS͒. When the concentration of SPS in the plating bath was varied from 0.05 to 0.5 mg/L with a plating time of 10 min, the ratio of the Cu thickness at the bottom of the hole (T b ) to that at the surface (T s ), called the bottom-up ratio, increased from 1.05 to 2.8 for a 1.0 m hole. The bottom-up ratio increases with SPS concentration and decreases with an increase in hole diameter. X-ray diffraction structure analyses and cross-sectional transmission electron microscopy observations indicated that the grain size of Cu film was reduced by the SPS addition, but Cu͑111͒ texture was enhanced by the SPS addition. Bottom-up fill may be attributed to a higher SPS concentration at the surface than at the bottom of the holes due to SPS incorporation in the Cu film and diffusion-limited flux of SPS molecules into fine holes.Copper ͑Cu͒ is used widely as an interconnection metal in ultralarge-scale integration ͑ULSI͒ circuits due to its lower resistivity and superior resistance against electromigration compared to conventional aluminum alloys. The present damascene copper interconnections are fabricated by electroplating on a sputtered Cu seed layer. To produce void-free and seamless fill for high-aspect-ratio trenches and via holes, superfill or bottom-up fill, in which the deposition rate at the bottom of the hole is higher than at the surface, is necessary. Cu electroplating baths containing additives, such as chloride ion, polyethylene glycol ͑PEG͒, bis͑3-sulfopropyl͒ disulfide ͑SPS͒, 3-mercapto-1-propanesulfonate ͑MPSA͒, or Janus Green B ͑JGB͒, have yielded desirable plating characteristics. 1-8 Inhibition to Cu deposition in the Cl-PEG-SPS system is due primarily to the combination of PEG and chloride ions, 2-5 with acceleration attributed to SPS. However, a major premise of the superfill deposition of electroplating is a continuous sputtered Cu seed layer. Because a shrinkage in dimensions occurs for next generation interconnections, forming a continuous sputtered Cu film on the sidewalls of fine via holes becomes more difficult as sputtering suffers from poor step coverage. Consequently, copper electroless plating and chemical vapor deposition ͑CVD͒ are the most promising processes for the formation of a seed layer for electroplating. 9-15 Bottom-up filling of submicrometer features by iodine-catalyzed CVD was reported by Shim et al., 9 Hwang and Lee, 10 and Josell et al.,11 but adhesion between the copper film and the barrier metal layer was poor and the deposition rate was slow. Copper electroless plating, which does not require a sputtered Cu seed layer, is an efficient means of filling high aspect ratio holes and has became increasingly important. 12-15 However, when the hole diameter is less than 70 nm, filling the highaspect-via-hole with normal electroless plating is difficult.Many studies report bottom-up fill of Cu in electroplating baths using additives, but few r...

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High aspect ratio quarter-micron electroless copper integrated technology

Cited by 51 publications

References 5 publications

Fabrication of the Electroless NiMoB Films as a Diffusion Barrier Layer on the Low-<em>k</em> Substrate

Fabrication of the Electroless NiMoB Films as a Diffusion Barrier Layer on the Low-<em>k</em> Substrate

Fabrication of potential NiMoP diffusion barrier/seed layers for Cu interconnects via electroless deposition

Bottom-Up Fill for Submicrometer Copper Via Holes of ULSIs by Electroless Plating

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