Hierarchical Task-Based Programming With StarSs

Planas, Judit; Badía, Rosa M.; Ayguadé, Eduard; Labarta, Jesús

doi:10.1177/1094342009106195

Cited by 142 publications

(110 citation statements)

References 18 publications

(22 reference statements)

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“…Recently, in order to cope with resource heterogeneity and enable performance portability, the use of dynamic runtime schedulers have been proposed, such as StarPU [1], StarSs [2], QUARK [17] or PaRSEC [3]. Applications are described as a set of tasks, whose dependencies can be automatically deduced from access to shared data with the STF model [1], or explicitly specified [3].…”

Section: Related Workmentioning

confidence: 99%

“…Adapting these distributions to heterogeneous settings is actually a hard algorithmic and technical challenge. However, to cope with the increasing heterogeneity of the architectures, task-based runtime systems (such as StarPU [1], StarSs [2], ParSEC [3], and others) are currently proposed, with the goal of enabling better performance portability for applications across different architectures. To this end, such runtime systems provide an efficient separation of the numerical computation from the associated scheduling and resource allocation decisions.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Eyraud-Dubois¹,

Lambert

2018

Proceedings of the 47th International Conference on Parallel Processing

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We consider the problem of data allocation when performing matrix multiplication on a heterogeneous node, with multicores and GPUs. Classical (cyclic) allocations designed for homogeneous settings are not appropriate, but the advent of task-based runtime systems makes it possible to use more general allocations. Previous theoretical work has proposed square and cube partitioning algorithms aimed at minimizing data movement for matrix multiplication. We propose techniques to adapt these continuous square partitionings to allocating discrete tiles of a matrix, and strategies to adapt the static allocation at runtime. We use these techniques in an implementation of Matrix Multiplication based on the StarPU runtime system, and we show through extensive experiments that this implementation allows to consistently obtain a lower communication volume while improving slightly the execution time, compared to standard state-of-the-art dynamic strategies.

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Section: Related Workmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Eyraud-Dubois¹,

Lambert

2018

Proceedings of the 47th International Conference on Parallel Processing

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“…StarSs (Star-superscalar) [PBAL09] is afamily of languages and runtime systems implemented for different kinds of parallel target platforms, such as CellSs, GPUSs, OMPSs, ClusterSs. Similarly as StarPU, the StarSs model extends sequential computing by discovering and scheduling data-ready sequential tasks, which are defined by invocations of specific user functions, at run-time to some available execution unit, such as an idle CPU core, aG PU or aC ell SPU.…”

Section: R Elated Workmentioning

confidence: 99%

Flexible Scheduling and Thread Allocation for Synchronous Parallel Tasks

Keßler¹,

Hansson²

2012

PARS-Mitteilungen

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We describe atask model and dynamic scheduling and resource allocation mechanism for synchronous parallel tasks to be executed on SPMD-programmed synchronous shared-memory MIMD parallel architectures with uniform, unit-time memory access and strict memory consistency, also known in the literature as PRAMs (Parallel Random Access Machines).Our task model provides atwo-tier programming model for PRAMs that flexibly combines SPMD and fork-join parallelism within the same application. It offers flexibility by dynamic scheduling and late resource binding while preserving the PRAM execution properties within each task, the only limitation being that the maximum number of threads that can be assigned to at ask is limited to what the underlying architecture provides. In particular,o ur approach opens for automatic performance tuning at run-time by controlling the thread allocation for tasks based on run-time predictions.By aprototype implementation of asynchronous parallel task API in the SPMDbased PRAM language Fork and experimental evaluation with example programs on the SBPRAM simulator,w es howt hat ar ealization of the task model on aS PMDprogrammable PRAM machine is feasible with moderate runtime overhead per task. 1I ntroductionDuring the recent years, computer architectures available on the consumer market have switched from single-core architectures to multi-cores, and it is reasonable to assume that we enter the many-core era in the near future. The reason for this change is that hardware manufacturers try to keep up with the demand of more computation power and at the same time consume less energy.A saconsequence, speed-up of legacy,s ingle-threaded computer programs does not come for free anym ore butr equires rewriting to leverage manycores. Even worse is that, even where providing ashared memory abstraction, these newa rchitectures mainly followN UMA and SMP designs that lack features that could ease parallel programming, such as strong memory consistencyordeterministic execution.To ease the burden for both application programmers and compiler engineers, some architecture projects [PBB + 02, For10, WV08] are working towards supporting more powerful, deterministic parallel programming models such as the PRAM model [FW78,KKT01]. The PRAM model is often considered as only at heoretical programming model, buta lready in the 1990s it has been realized in hardware, albeit not on asingle chip, e.g. the SB-PRAM [PBB + 02, KKT01]. In acurrent project by VTT Oulu (Finland) anew architecture 517

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“…The runtime system then organizes execution of all tasks respecting the constraints, avoiding the need for the programmer to reason (and potentially make difficult-to-find mistakes) about the circumstances when the dependencies are fulfilled. StarSs [4] and OmpSs [5] are good examples of such a paradigm. The runtime system of those programming models builds, at runtime, a task graph based on the sequence of function calls and their input/output requirements, and determines which tasks are ready to run.…”

Section: Introductionmentioning

confidence: 99%

“…To obtain speedups from these new architectures, applications need to use parallel algorithms, which are more challenging to develop than their sequential alternatives. Many programming models have been proposed to ease parallel programming, such as Google's MapReduce [1], Intel's TBB [2], OpenMP [3], StarSs [4] and OmpSs [5]. All parallel programming models share the goal of decoupling the programmer from the underlying multicore machine, but they differ from one another in the degree of abstraction.…”

Section: Introductionmentioning

confidence: 99%

An Integrated Hardware-Software Approach to Task Graph Management

Engelhardt

Dallou

Elhossini

et al. 2014

2014 IEEE Intl Conf on High Performance Computing and Communications, 2014 IEEE 6th Intl Symp on Cyberspace Safety and Security

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Abstract-Task-based parallel programming models with explicit data dependencies, such as OmpSs, are gaining popularity, due to the ease of describing parallel algorithms with complex and irregular dependency patterns. These advantages, however, come at a steep cost of runtime overhead incurred by dynamic dependency resolution. Hardware support for task management has been proposed in previous work as a possible solution. We present VSs, a runtime library for the OmpSs programming model that integrates the Nexus++ hardware task manager, and evaluate the performance of the VSs-Nexus++ system. Experimental results show that applications with fine-grain tasks can achieve speedups of up to 3.4×, while applications optimized for current runtimes attain 1.3×. Providing support for hardware task managers in runtime libraries is therefore a viable approach to improve the performance of OmpSs applications.

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Hierarchical Task-Based Programming With StarSs

Cited by 142 publications

References 18 publications

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Using Static Allocation Algorithms for Matrix Matrix Multiplication on Multicores and GPUs

Flexible Scheduling and Thread Allocation for Synchronous Parallel Tasks

An Integrated Hardware-Software Approach to Task Graph Management

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