IEEE/ION Position, Location and Navigation Symposium 2010
DOI: 10.1109/plans.2010.5507214
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Hierarchical code acquisition for dual band GNSS receivers

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Cited by 5 publications
(6 citation statements)
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“…For example, P f = 10 means that the entire UR processing (time and frequency) requires 10 times the code duration. According to (9), 200 frequency bins of 100 Hz are considered along with a sampling timing error equal to 0:0625 T c . The time search only is also reported as a reference while the case P f = 1 represents the performance obtained with no hardware limitations or constraints.…”
Section: Simulation Results With Time/frequency Domain Searchmentioning
confidence: 99%
See 3 more Smart Citations
“…For example, P f = 10 means that the entire UR processing (time and frequency) requires 10 times the code duration. According to (9), 200 frequency bins of 100 Hz are considered along with a sampling timing error equal to 0:0625 T c . The time search only is also reported as a reference while the case P f = 1 represents the performance obtained with no hardware limitations or constraints.…”
Section: Simulation Results With Time/frequency Domain Searchmentioning
confidence: 99%
“…As already anticipated we process pilot codes only to perform code acquisition in the two bands, i.e., the signal component E1c in E1, and the signal component E5aQ in E5 [9]. In addition in E5 a single side band (SSB) processing scheme is considered [16]: accordingly, a frequency shift is performed over the entire received signal in order to convert in frequency the E5a component and by processing the resulting signal in a classical binary phase-shift keying (BPSK) fashion, strongly simplifying the baseband processing stage.…”
Section: Receiver Architecturementioning
confidence: 99%
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“…Note that the signals use different code lengths and different data rates. The hierarchical code acquisition results in two major advantages: a reduced complexity, since a reduced number of acquisition tests have to be performed, and an increased performance due to the reduced acquisition time [6]. The digital signal processing -composed of the baseband processing, the channels and processors -is implemented on a rapid prototyping platform in a field programmable gate array (FPGA).…”
Section: A Baseband Processingmentioning
confidence: 99%