Heterogeneous 3D Nano-systems: The N3XT Approach?

Rich, D. R.; Bartolo, Andrew; Gilardo, Carlo; Le, Binh; Li, Haitong; Park, Rebecca; Radway, Robert M.; Aly, Mohamed M. Sabry; Wong, H.-S. Philip; Mitra, Subhasish

doi:10.1007/978-3-030-18338-7_9

Cited by 7 publications

(2 citation statements)

References 89 publications

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“…The excessive access time of a microprocessor for communication with the off-chip main memory is among the major hurdles holding back ultrafast computing. 8 Ultrafast optoelectronics offers a disruptive technology solution that can enhance the performance of communications and computation, contributing to the fundamental transformation in the field of computer architecture. Combined with photonics, optoelectronics enables ultrahigh throughput, minimal access latencies, and low power dissipation that mostly remain independent of device bandwidth and propagation distance.…”

Section: Introductionmentioning

confidence: 99%

Materials for ultra-efficient, high-speed optoelectronics

Islam

2022

MRS Bulletin

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High-speed optoelectronics is central to many important developments in the communication, computing, sensing, imaging, and autonomous vehicle industries. With a sharp rise of attention on energy efficiency, researchers have proposed and demonstrated innovative materials, high-speed devices, and components integrated on a single platform that exhibit ultralow power consumption and ultrawide bandwidth. Recently reported material growth and device fabrication techniques offer the potential for high-density integration of optoelectronics close to the capability and cost of conventional electronics. A tremendous synergy can be attained by integrating multiple materials with superior properties on the same chip using heterogeneous integration, heteroepitaxy, nano-heteroepitaxy, and other co-packaging strategies within the complementary metal oxide semiconductor (CMOS) ecosystem. This issue of MRS Bulletin offers an overview of the field and covers the latest developments on various ultraefficient materials, high-speed devices, their physical properties, current trends, and future directions in optoelectronics and their integration on a silicon platform. Graphical abstract

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Section: Introductionmentioning

confidence: 99%

Materials for ultra-efficient, high-speed optoelectronics

Islam

2022

MRS Bulletin

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“…Several such 3D-stacked memory architectures, such as the Hybrid Memory Cube [150,151] and High-Bandwidth Memory [149,152], include a logic layer, where designers can add some processing logic (e.g., accelerators, simple cores, reconfigurable logic) to take advantage of this high internal bandwidth. Future die-stacking technologies, like monolithic 3D [153,154,155,156,157,158,159], can amplify the benefits of this approach by greatly improving internal bandwidth and the number of logic layers between memory layers.…”

Section: Introductionmentioning

confidence: 99%

A Modern Primer on Processing in Memory

Mutlu¹,

Ghose²,

Gómez-Luna³

et al. 2020

Preprint

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Modern computing systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in computing that cause performance, scalability and energy bottlenecks:(1) data access is a key bottleneck as many important applications are increasingly data-intensive, and memory bandwidth and energy do not scale well, (2) energy consumption is a key limiter in almost all computing platforms, especially server and mobile systems, (3) data movement, especially off-chip to on-chip, is very expensive in terms of bandwidth, energy and latency, much more so than computation. These trends are especially severely-felt in the data-intensive server and energy-constrained mobile systems of today.At the same time, conventional memory technology is facing many technology scaling challenges in terms of reliability, energy, and performance. As a result, memory system architects are open to organizing memory in different ways and making it more intelligent, at the expense of higher cost. The emergence of 3D-stacked memory plus logic, the adoption of error correcting codes inside the latest DRAM chips, proliferation of different main memory standards and chips, specialized for different purposes (e.g., graphics, low-power, high bandwidth, low latency), and the necessity of designing new solutions to serious reliability and security issues, such as the RowHammer phenomenon, are an evidence of this trend.This chapter discusses recent research that aims to practically enable computation close to data, an approach we call processing-in-memory (PIM). PIM places computation mechanisms in or near where the data is stored (i.e., inside the memory chips, in the logic layer of 3D-stacked memory, or in the memory controllers), so that data movement between the computation units and memory is reduced or eliminated. While the general idea of PIM is not new, we discuss motivating trends in applications as well as memory circuits/technology that greatly exacerbate the need for enabling it in modern computing systems. We examine at least two promising new approaches to designing PIM systems to accelerate important data-intensive applications: (1) processing using memory by exploiting analog operational properties of DRAM chips to perform massively-parallel operations in memory, with low-cost changes, (2) processing near memory by exploiting 3D-stacked memory technology design to provide high memory bandwidth and low memory latency to in-memory logic. In both approaches, we describe and tackle relevant cross-layer research, design, and adoption challenges in devices, architecture, systems, and programming models. Our focus is on the development of in-memory processing designs that can be adopted in real computing platforms at low cost. We conclude by discussing work on solving key challenges to the practical adoption of PIM.

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