2020
DOI: 10.1109/lca.2020.2992644
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Heterogeneous 3D Integration for a RISC-V System With STT-MRAM

Abstract: Spin Torque Transfer Magnetic RAM (STT-MRAM) is a promising Non-Volatile Memory (NVM) technology achieving high density, low leakage power, and relatively small read/write delays. It provides a solution to improve the performance and to mitigate the leakage power consumption compared to SRAM-based processors. However, the process heterogeneity and the sophisticated back-end-of-line (BEOL) structure make it difficult to integrate the STT-MRAM in two-dimensional integrated circuits (2D ICs). In this paper, we im… Show more

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Cited by 14 publications
(9 citation statements)
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References 11 publications
(13 reference statements)
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“…They considered SRAM for only 1 cache way among 32 ways and MRAM for the other cache ways. Also, they adopted a write buffer scheme to hide long write latency for MRAM, which is widely used in many other previous work on MRAM-based on-chip caches [ [41]. In addition to MRAM-based large caches, several researchers proposed MRAM-based register files [17] and L1 caches [20] [36], which also avoid long MRAM write latency based on small write buffers.…”
Section: B Non-volatile Memory (Nvm)mentioning
confidence: 99%
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“…They considered SRAM for only 1 cache way among 32 ways and MRAM for the other cache ways. Also, they adopted a write buffer scheme to hide long write latency for MRAM, which is widely used in many other previous work on MRAM-based on-chip caches [ [41]. In addition to MRAM-based large caches, several researchers proposed MRAM-based register files [17] and L1 caches [20] [36], which also avoid long MRAM write latency based on small write buffers.…”
Section: B Non-volatile Memory (Nvm)mentioning
confidence: 99%
“…Among various memory cells, MRAM is widely considered as a promising alternative to SRAM, due to its comparable read latency as well as small area. However, as MRAM requires larger peripheral circuits compared to SRAM, the area reduction by MRAM would be marginal in small on-chip caches [41], while it would be significant in large-size caches. Secondly, we can consider 3D stacking of SRAM/MRAM hybrid memory.…”
Section: A M3d-based Sram/mram Hybrid Memorymentioning
confidence: 99%
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“… 1 MRAM, the current spintronics flagship application, promises further increases in efficiency and performance of integrated electronic circuits. 2 4 Furthermore, a unified spin variable is foreseen as a strong post-CMOS asset to merge in-memory processing with stochastic, neuromorphic, and quantum technologies. 5 11 This fuels the quest for further progress in material science toward efficient spin platforms.…”
Section: Introductionmentioning
confidence: 99%
“…Spintronics contributed to the birth of the big data era with highly sensitive hard-drive read-heads allowing dramatic data storage scaling . MRAM, the current spintronics flagship application, promises further increases in efficiency and performance of integrated electronic circuits. Furthermore, a unified spin variable is foreseen as a strong post-CMOS asset to merge in-memory processing with stochastic, neuromorphic, and quantum technologies. This fuels the quest for further progress in material science toward efficient spin platforms. Along this direction, 2D materials have appeared particularly exciting in terms of ultimate atomic interface control and multifunctional heterostructure definition. Graphene represents the archetype of all 2D materials and has been put forward for efficient spin transport . It has indeed been demonstrated to efficiently preserve spin information during transport particularly due to its low spin–orbit coupling associated with high mobilities. , Graphene has furthermore shown promising performances in vertical magnetic tunnel junction (MTJ) spin-valve devices with efficient spin filtering as well as stark potential for perpendicular magnetic anisotropy (PMA), spin–orbit torques (SOT), and skyrmion topological spin textures. …”
Section: Introductionmentioning
confidence: 99%