HDL implementation of Kalman Filter for GNSS receiver

Abstract

This paper presents HDL implementation of Kalman Filter. Kalman Filter is a mathematical tool, which uses sequence of noisy measurement taken over time to predict unknown state vector parameter. In this paper implementation in HDL has been done using new method that is chebyshev inversion method. The approach of new method is for reducing hardware and complexity. Kalman Filter has very complex matrix calculation and matrix inversion. To perform matrix inversion in HDL(Hardware Description Language) using less hardware is difficult. Chebyshev method is less complex so hardware can reduced for calculation of Kalman Filter equations Here simulation is done in FPGA(Field Programmable Gate Array) Vertex-6.

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“…According to the results in Table 3, compared with [20], the proposed approach has significantly decreased in register utilization. Compared with [37], though the proposed approach is little more in register utilization, the timing of hardware still has a huge advantage. Tables 3 and 4 present the logic element using by number of LUT inputs, total registers, total I/O pins, and embedded multiplier 9-bit elements, as compared with [18,19], not only has lower resource usage, but also has a huge advantage in processing time.…”

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“…Subsequently, domestic and foreign researchers proposed various design schemes with different structural forms to implement Kalman filters, such as Baheti's [2] proposal to map EKF to a linear array structure, thereby improving the real-time performance of the algorithm, but its filtering effect is not satisfactory; Jover and Kailath [3] proposed a Kalman filtering scheme based on UD decomposition, similar to the research work of Hashimoto [4] and Behera [5]. However, these studies only perform parallel processing on the measurement update part of the Kalman filtering algorithm, without considering the time update part, so they are not complete Kalman filtering; Yeh [6] implemented a joint covariance information filtering algorithm using a trapezoidal array structure based on the Faddeev algorithm; Lee [7,8] proposed a Kalman filter implementation structure based on FPGA's maximum parallel structure, which adopts a pipeline structure and applies high-performance algorithm operation units, achieving good results; Bigdeli [9] proposed a matrix inversion operation based on pulsating array structure and applied it to the implementation of Kalman filters; Namrata [10] used the Chebyshev inversion method to perform matrix inversion calculations in Kalman filtering, reducing the number of registers and LUTs required for hardware implementation; Zeyang Dai [11] utilized Xilinx's HLS tool and designed a matrix acceleration IP using C language to accelerate matrix inversion and multiplication. The simulation was completed on Zynq-7020; Mohan Pudi [12] adjusts the storage of matrices in a cyclic manner to accelerate triple cyclic matrix multiplication.…”