FPGA-Based Implementation of Reduced-Complexity Filtering Algorithm for Real-Time Location Tracking

Chen, Wei‐Ting; Chen, Shih-Lun; Chiou, Yih‐Shyh; Lin, Ting-Lan; Wen, Fu-Jung; Lin, Yang-Ke

doi:10.1109/dasc/picom/cbdcom/cyberscitech.2019.00136

Cited by 2 publications

(7 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…10 Chen designed the Kalman filtering calculation by combining the simplified algorithm with the parallel pipeline architecture, which was used to complete the continuous tracking of the target, and the calculation update time was less than 34 ns. 11 In literature, 12 the method of dual-core Cortex-A9 software combined with digital logic acceleration is adopted to realize Kalman filtering solution with delay of 970 ns in XC7Z010. In Reference 13, Tiny-Yolo combined with Kalman filter based on FPGA was used to realize real-time tracking of the target, and the calculated rate reached 38FPS.…”

Section: Introductionmentioning

confidence: 99%

“…Si realizes Kalman filtering calculation based on FPGA, and the Angle tracking of moving target reaches 0.1°, which meets the real‐time calculation requirements of sinusoidal rotation frequency of turntable at 1 Hz 10 . Chen designed the Kalman filtering calculation by combining the simplified algorithm with the parallel pipeline architecture, which was used to complete the continuous tracking of the target, and the calculation update time was less than 34 ns 11 . In literature, 12 the method of dual‐core Cortex‐A9 software combined with digital logic acceleration is adopted to realize Kalman filtering solution with delay of 970 ns in XC7Z010.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Parallel accelerated computing architecture for dim target tracking on‐board

Yu,

Huang,

et al. 2023

Computational Intelligence

View full text Add to dashboard Cite

The real‐time tracking process of dim targets in space is mainly achieved through the correlation and prediction of dots after the detection and calculation process. The on‐board calculation of the tracking needs to be completed in milliseconds, and it needs to reach the microsecond level at high frame rates. For real‐time tracking of dim targets in space, it is necessary to achieve universal tracking calculation acceleration in response to different space regions and complex backgrounds, which poses high requirements for engineering implementation architecture. This paper designs a Kalman filter calculation based on digital logic parallel acceleration architecture for real‐time solution of dim target tracking on‐board. A unified architecture of Vector Processing Element (VPE) was established for the calculation of Kalman filtering matrix, and an array computing structure based on VPE was designed to decompose the entire filtering process and form a parallel pipelined data stream. The prediction errors under different fixed point bit widths were analyzed and deduced, and the guidance methods for selecting the optimal bit width based on the statistical results were provided. The entire design was engineered based on Xilinx's XC7K325T, resulting in an energy efficiency improvement compared to previous designs. The single iteration calculation time does not exceed 0.7 microseconds, which can meet the current high frame rate target tracking requirements. The effectiveness of this design has been verified through simulation of random trajectory data, which is consistent with the theoretical calculation error.

show abstract

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Parallel accelerated computing architecture for dim target tracking on‐board

Yu,

Huang,

et al. 2023

Computational Intelligence

View full text Add to dashboard Cite

show abstract

“…Most of today's positioning and tracking systems are developed and implemented with software. However, software implementations often result in speed delay and cannot provide in-time positioning information for LBS applications [17][18][19][20]. In order to improve the computational speed of positioning systems and accuracy, there already are lots of improved algorithms in literature [21][22][23][24][25][26][27][28][29][30][31][32][33][34].…”

Section: Introductionmentioning

confidence: 99%

“…The calculations of the KF approach are involved in the number of matrix computations, which include addition, multiplication, and inverse operations. The approach is difficult to implement hardware in traditional devices with some practical systems, such as high performances in real-time, flexible and convenient implementation [10,[17][18][19][20][30][31][32]. In addition, the processors of Digital Signal Processing (DSP) adopt sequential program execution.…”

Section: Introductionmentioning

confidence: 99%

“…Actually, one possible way to increase performance is through the use of hardware acceleration using field-programmable gate arrays (FPGAs). Implementing functions as hardware have the potential to allow the use of more complex algorithms such as KF, and the approach also allows the implementation of multiple functions-as-a-chip systems on a single FPGA [16][17][18][19][20]. Each logical unit of the FPGA is determined at the time of programming, and no instructions are required.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation

Chiou

Chen

2023

Electronics

Self Cite

View full text Add to dashboard Cite

This article puts forward a low-complexity filtering algorithm to achieve a low-complexity filtering chip design for real-time location tracking. In order to meet the need for low-complexity and real-time, the positioning tracking algorithm based on Kalman Filter (KF) is proposed. The KF itself has the functions of tracking, predicting, etc., which can correct the positioning into more accurate results. However, in the calculation of KF algorithms, each iteration often requires tedious and complex calculations of Kalman Gain (KG). Both software and hardware are very resource-intensive. Therefore, use the feature of KG in alpha-beta (α-β) filtering algorithm which can gradually balance in each iteration. Proposed a filtering algorithm that is based on low-complexity, low cost, and high efficiency. This algorithm uses DKF (Difference Kalman Filter) and PKF (Percentage Kalman Filter) depending on different environments. In other words, DKF and PKF are the algorithms which are generated based on different judging conditions. This algorithm can not only significantly reduce the time and the complexity of computing, but also greatly shorten the circuit area of the original algorithm. This algorithm has a large number of matrix operation. In the hardware calculation process, it solves matrix problems about hardware and then developed chip design. Coefficients are used by a multiple of 2 for operation. Use shifters instead of multipliers and dividers, significantly reducing complexity and circuit area. At the same time, deal with the problem of a floating-point number, achieve circuit function verification on the FPGA, and finally tape-out. The design uses the TSMC 0.18μm CMOS cell library provided by the TSRI, uses EDA to implement VLSI with the Design Vision of SYNOPSYS, the operating frequency of the circuit is 83.33 MHz, the value of gate counts is 22.84 K, the power consumption is 3.86 mW, and chip area is 582.63 μm × 580.23 μm.

show abstract

FPGA-Based Implementation of Reduced-Complexity Filtering Algorithm for Real-Time Location Tracking

Cited by 2 publications

References 7 publications

Parallel accelerated computing architecture for dim target tracking on‐board

Parallel accelerated computing architecture for dim target tracking on‐board

Reduced-Complexity Tracking Algorithms on Chip for Real-Time Location Estimation

Contact Info

Product

Resources

About