Hardware synthesis from a recursive functional language

Zhai, Kuangya; Townsend, Richard; Lairmore, Lianne; Kim, Martha A.; Edwards, Stephen A.

doi:10.1109/codesisss.2015.7331371

Cited by 7 publications

(8 citation statements)

References 24 publications

(21 reference statements)

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“…This has led him and other collaborators to pursue Haskell as a source [Zhai et al 2015]. The use of functional abstractions, such as monads, greatly speeds the construction of complex circuits and makes their specifications more extensible.…”

Section: Related Workmentioning

confidence: 98%

A Principled Approach to Secure Multi-core Processor Design with ReWire

Procter

Harrison

Graves

et al. 2017

ACM Trans. Embed. Comput. Syst.

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There is no such thing as high assurance without high assurance hardware. High assurance hardware is essential because any and all high assurance systems ultimately depend on hardware that conforms to, and does not undermine, critical system properties and invariants. And yet, high assurance hardware development is stymied by the conceptual gap between formal methods and hardware description languages used by engineers. This article advocates a semantics-directed approach to bridge this conceptual gap. We present a case study in the design of secure processors, which are formally derived via principled techniques grounded in functional programming and equational reasoning. The case study comprises the development of secure single-and dual-core variants of a single processor, both based on a common semantic specification of the ISA. We demonstrate via formal equational reasoning that the dual-core processor respects a "nowrite-down" information flow policy. The semantics-directed approach enables a modular and extensible style of system design and verification. The secure processors require only a very small amount of additional code to specify and implement, and their security verification arguments are concise and readable. Our approach rests critically on ReWire, a functional programming language providing a suitable foundation for formal verification of hardware designs. This case study demonstrates both ReWire's expressiveness as a programming language and its power as a framework for formal, high-level reasoning about hardware systems.CCS Concepts: r Security and privacy → Logic and verification; Security in hardware; r Hardware → Hardware description languages and compilation; Functional verification; r Software and its engineering → Functional languages;Additional Key Words and Phrases: Equational reasoning, monads, hardware security, reconfigurable computing ACM Reference Format: Adam Procter, William L. Harrison, Ian Graves, Michela Becchi, and Gerard Allwein. 2017. A principled approach to secure multicore processor design with ReWire.

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Section: Related Workmentioning

confidence: 98%

A Principled Approach to Secure Multi-core Processor Design with ReWire

Procter

Harrison

Graves

et al. 2017

ACM Trans. Embed. Comput. Syst.

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“…We allow only tail-recursion in functions; our compiler uses the technique of Zhai et al [30] to transform arbitrary recursion into tail-recursion with an explicit stack. Although these stacks are currently in the heap, we will eventually use custom stacks.…”

Section: Our Intermediate Representation "Floh"mentioning

confidence: 99%

“…We make two main contributions to attack these limitations: a largely syntax-directed translation of a functional IR into an abstract dataflow model that exhibits pipeline and other forms of parallelism, and a technique for implementing such abstract networks in hardware with limited, bounded buffering. Our translation handles algebraic data types, non-recursive function calls, and groups of mutually tail-recursive functions; an earlier pass in our compilation flow dismantles programs with arbitrary recursion into this form using a technique presented elsewhere [30].…”

Section: Introductionmentioning

confidence: 99%

From functional programs to pipelined dataflow circuits

Townsend

Kim

Edwards

2017

Proceedings of the 26th International Conference on Compiler Construction

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We present a translation from programs expressed in a functional IR into dataflow networks as an intermediate step within a Haskellto-Hardware compiler. Our networks exploit pipeline parallelism, particularly across multiple tail-recursive calls, via non-strict function evaluation. To handle the long-latency memory operations common to our target applications, we employ a latency-insensitive methodology that ensures arbitrary delays do not change the functionality of the circuit. We present empirical results comparing our networks against their strict counterparts, showing that nonstrictness can mitigate small increases in memory latency and improve overall performance by up to 2×.

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“…Finally, the formal methodology supported by ReWire, illustrated in previous publications [43,84,46,83], is precisely that of pure functional languages; this is sometimes referred to as "Bird-Wadler" style program derivation (sonamed after an in uential textbook [12]). A Bird-Wadler derivation starts from a reference speci cation for an algorithm in a functional language and, through a series of semantics- Zhai et al [113] consider high-level synthesis from recursive functional languages.…”

Section: Related Workmentioning

confidence: 99%

“…It is generally recognized that recon gurable technology has a "programmability" problem [7,3] and high-level synthesis (HLS) from functional languages is a commonly proposed remedy for this problem [33,95,13,5,14,6,34,113]. Pure functional languages-i.e., those without side e ects-support equational reasoning as a basis for program veri ca-tion.…”

Section: Introductionmentioning

confidence: 99%

Mechanizing the metatheory of rewire

Reynolds¹

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The [lambda]-calculus provides a simple, well-established framework for research in functional programming languages that readily lends itself to the use offormal methods--that is, the use of mathematically sound techniques and supporting tools--to describe and verify properties of programming languages, as well. This is no coincidence. After all, the [lambda]-calculus formalizes the concept of effective computability, for all computable functions are definable in the untyped [lambda]-calculus, making it expressively equivalent torecursive functions. In software, the expressiveness of functional languages is considereda strength. Functional approaches to language design, however, needn't be limited to soft-ware. In hardware, the expressiveness of functional languages becomes a major obstacle to successful hardware synthesis, for the reason that such languages are usually capable of expressing general recursion. The presence of general recursion makes it possible to generate expressions that run forever, never producing a well-defined value. In this dissertation, we study two novel variants of the simply typed [lambda]-calculus, representing fragments of functional hardware description languages. The first variant extends the type system, using natural numbers representing time. This addition, though simple, is non-trivial. We prove that this calculus possesses bounded variants of type-safety and strong normalization. That is to say, we show that all well-typed expressions evaluate to values within a bound determined by the natural number index of their corresponding types. The second variant is a computational [lambda]-calculus that formalizes the core fragment of the hardware description language known as ReWire. We prove that the language has type-safety and is strongly normalizing -- the proof of strong normalizationis the first mechanized proof of its kind. We define an equational theory with respect to this language. This allows us to prove that the language has desirable security properties by construction. This work supports a full-edged, formal methodology for producing high assurance hardware.

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Hardware synthesis from a recursive functional language

Cited by 7 publications

References 24 publications

A Principled Approach to Secure Multi-core Processor Design with ReWire

A Principled Approach to Secure Multi-core Processor Design with ReWire

From functional programs to pipelined dataflow circuits

Mechanizing the metatheory of rewire

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