Proceedings DARPA Information Survivability Conference and Exposition II. DISCEX'01
DOI: 10.1109/discex.2001.932167
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Hardware support for a hash-based IP traceback

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Cited by 33 publications
(12 citation statements)
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“…Figure 7 depicts a possible implementation of a SPIE Data Generation Agent in hardware for use on high-speed routers. A full discussion of the details of the architecture and an analysis of its performance were presented previously [26]. Briefly, each interface card in the router is outfitted with an Interface Tap which computes multiple independent digests of each packet as it is forwarded.…”
Section: Practical Implementationmentioning
confidence: 99%
“…Figure 7 depicts a possible implementation of a SPIE Data Generation Agent in hardware for use on high-speed routers. A full discussion of the details of the architecture and an analysis of its performance were presented previously [26]. Briefly, each interface card in the router is outfitted with an Interface Tap which computes multiple independent digests of each packet as it is forwarded.…”
Section: Practical Implementationmentioning
confidence: 99%
“…The speed of DGA to handle packet digests is 10% of the link rate for the OC-192 link [10]. The transmission rate of OC-192 is 9.953Gb/s.…”
Section: Performance Evaluationmentioning
confidence: 99%
“…For example, Feghali et al [31] presented an implementation of wellknown private-key encryption algorithms on the Intel IXP28xx network processors to keep pace with a 10-Gbps forwarding rate. Furthermore, Sanchez et al [32] demonstrated hardware support to compute fingerprints at wire speed of high speed routers (OC-48 and faster).…”
Section: Computing Fingerprintsmentioning
confidence: 99%