Hardware/software codesign: a systematic approach targeting data-intensive applications

Wiangtong, Theerayod; Cheung, Peter Y. K.; Luk, Wayne

doi:10.1109/msp.2005.1425894

Cited by 34 publications

(27 citation statements)

References 17 publications

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“…The hardware/software co-design method emphasizes on coordination between hardware designers and software designers, concurrent design of systematic hardware and software [4][5][6], and control of the consistency of hardware/software and correctness of the system during the whole designing process.…”

Section: Hardware-software Co-designmentioning

confidence: 99%

The Application of Computerized Algorithms in the Design Method of Software-hardware Dual-track Partitioning in an Embedded System Abstract

Wang¹,

Yang²,

Shen³

et al. 2015

TOAUTOCJ

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It has been proved that the hardware/software partitioning problem is NP-hard. Currently, we have tried a variety of computerized algorithms to resolve it, which can be divided into two major categories: accurate algorithms and heuristic algorithms. This paper will discuss accurate algorithms and heuristic algorithms respectively. Accurate algorithms take the example of a greedy algorithm. It abstracts the hardware/software partitioning problem into 01 knapsack model and obtains the exact optimal solution by the greedy algorithm, while heuristic algorithms use a genetic algorithm as an example. It converts the hardware/software partitioning problem into a multi-constraint 0-1 knapsack problem and solves it by employing the genetic algorithm therein. By steps like "variation" and "crossover", this algorithm makes an offspring solution quickly approach an optimal solution, thereby constructing a near-optimal heuristic solution of the HW/SW partitioning problem. Experimental results demonstrate that the algorithm proposed in this paper can effectively resolve the hardware/software partitioning problem, have a good global searching capability, and the heuristic algorithm performs faster than the traditional accurate algorithm, but the heuristic algorithm only acquires a near-optimal solution, which is not perfect.

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Section: Hardware-software Co-designmentioning

confidence: 99%

The Application of Computerized Algorithms in the Design Method of Software-hardware Dual-track Partitioning in an Embedded System Abstract

Wang¹,

Yang²,

Shen³

et al. 2015

TOAUTOCJ

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show abstract

“…Therefore, Partitioning is a well-known problem. During the last years, many partitioning approaches have been proposed to automate the partitioning process decision of hardware and software components (De Michell and Gupta 1997;Wiangtong et al 2005). The feasibility of these approaches depends essentially on the system-level specification, the target architecture and the constraints parameters (hardware size, power consumption, execution time, computation, etc.).…”

Section: Hardware/software Partitioning Approachesmentioning

confidence: 99%

Impact of Hardware/Software Partitioning and MicroBlaze FPGA Configurations on the Embedded Systems Performances

Mhadhbi

Litayem

Othman

et al. 2014

Complex System Modelling and Control Through Intelligent Soft Computations

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Due to their flexible architecture, lower-cost and faster processing, Field Programmable Gate Array (FPGA) presents one of the stimulating choices for implementing modern embedded systems. This is due to their intrinsic parallelism, fast processing speed, rising integration scale and lower-cost solution. This kind of platforms can be considered as a futuristic implementation platform. The growing configurable logic capacity of FPGA has enabled designers to incorporate one or more processors in FPGA platform. In contrast to the traditional hard cores, the soft cores processors present an interesting solutions for implementing embedded applications. They give designers the ability to adapt many configurations to their specific application; including memory subsystems, interrupt handling, ISA features, etc. Faced to the various problems related to the selection of an efficient soft-core FPGA embedded processor with appropriate configuration, co-design methodology presents a good deal for embedded designers. The most crucial step in the design of embedded systems is the hardware/software partitioning. This step consists of deciding which component is suitable for hardware implementation and which one is more appropriate for software implementation. This research field is especially active (always on the move) and several approaches are proposed. In this chapter, we will present our contribution on the hardware/software partitioning co-design approach, and discuss their involvement on design acceleration and architecture performances. The first part of this chapter describes the effect of the MicroBlaze Xilinx configuration on the embedded system performance. The second part

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“…Embedded FPGA systems have emerged rapidly during the last decade from expensive and complicated products, dedicated mainly for military and space applications, to modest cost products that are used in wide range of commercial applications [7][8][9]. Nowadays, embedded FPGA systems are the first, and mainly the only available, choice for products that need rapid signal processing and computing such as video graphics and video encoders [10,11]. FPGAs are at the heart of many systems and ideal for rapid prototyping of embedded systems designs.…”

Section: Introductionmentioning

confidence: 99%

Constructivist Multi-Access Lab Approach in Teaching FPGA Systems Design with LabVIEW

2013

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Hardware/software codesign: a systematic approach targeting data-intensive applications

Cited by 34 publications

References 17 publications

The Application of Computerized Algorithms in the Design Method of Software-hardware Dual-track Partitioning in an Embedded System Abstract

The Application of Computerized Algorithms in the Design Method of Software-hardware Dual-track Partitioning in an Embedded System Abstract

Impact of Hardware/Software Partitioning and MicroBlaze FPGA Configurations on the Embedded Systems Performances

Constructivist Multi-Access Lab Approach in Teaching FPGA Systems Design with LabVIEW

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