Hardware implementation of recursive algorithms

Mihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitson, Alexander

doi:10.1109/mwscas.2010.5548674

Cited by 10 publications

(8 citation statements)

References 4 publications

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“…The results of experiments are presented in [8,9,11,12,[19][20][21] and they clearly demonstrate the advantages of the proposed technique.…”

Section: Methodsmentioning

confidence: 92%

“…Here stack_pointer is a stack pointer common to both M_stack and FSM_stack; signals push and pop increment and decrement the stack_pointer. Figure 5 depicts the structure of a HFSM with implicit modules [11,12]. The HFSM in Figure 5 behaves like an ordinary FSM and a single stack of states is used just for returns from called modules.…”

Section: Hfsm With Explicit Modulesmentioning

confidence: 99%

“…In general, communicating HFSMs are very similar to communicating FSMs [2] but they provide support for additional useful features, such as that are indicated in previous sub-sections of this section. Example of communicating HFSMs for parallel sorting can be found in [11].…”

Section: Static and Dynamic Binding Of Modulesmentioning

confidence: 99%

“…In [11] the sorting algorithm was improved by applying some optimization technique and parallelization based on communicating HFSM. The results of experiments have shown improvements over software, even in the case of implementations on the basis of very cheap and relatively slow FPGAs of the Xilinx Spartan 3e family.…”

Section: Recursive Sorting Algorithmsmentioning

confidence: 99%

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Synthesis of circuits and systems from hierarchical and parallel specifications

Sklyarov

2010

2010 12th Biennial Baltic Electronics Conference

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The paper integrates the results of the previous work and presents the complete methodology for synthesis of digital circuits and systems from hierarchical and parallel specifications expressed in the form of hierarchical graph-schemes. Such specifications provide support for design reuse, parallelization and other important features highlighted in the paper. The synthesis is based on the model of a hierarchical finite state machine (HFSM) and the proposed design templates. Two different types of HFSM (with explicit and implicit modules) are discussed. Practicability and advantages of the proposed technique are demonstrated on numerous examples, such as data sorting, priority buffering and embedded controllers.

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“…The results of experiments are presented in [8,9,11,12,[19][20][21] and they clearly demonstrate the advantages of the proposed technique.…”

Section: Methodsmentioning

confidence: 92%

Section: Hfsm With Explicit Modulesmentioning

confidence: 99%

Section: Static and Dynamic Binding Of Modulesmentioning

confidence: 99%

Section: Recursive Sorting Algorithmsmentioning

confidence: 99%

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Synthesis of circuits and systems from hierarchical and parallel specifications

Sklyarov

2010

2010 12th Biennial Baltic Electronics Conference

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“…The set of HGSs is a synthesizable specification making it possible to design the sorter hardware based on the model of hierarchical finite state machine (HFSM) [16]. At the beginning the HGSs are optimized in such a way that permits to take into account particularities of the target hardware platform such as rational use of dual-port memories applying methods [17]. Fig.…”

Section: B Sequential Sortmentioning

confidence: 99%