Hardware implementation of communication protocols modeled by concurrent EFSMs with multi-way synchronization

Abstract

In this paper, we propose a technique to implement communication protocols as hardware circuits using a model of concurrent EFSMs with multi-way synchronization. Since use of multi-way synchronization enables simple and comprehensible specifications of recent communication protocols which frequently use complicated mechanisms such as mutual exclusion and dynamic job assignment, the proposed model is expected to reduce development cost in designing/developing such protocols. We implement specifications described in the model so that EFSMs work synchronously with the same clock, and that the synchronization mechanism for checking executability of each tuple of synchronizing transitions is implemented as a combinational logic circuit. Through some experiments, we have confirmed that the proposed technique can synthesize hardware circuits with relatively good performances for practical use.

Hardware Implementation of Concurrent Periodic EFSMs

“…Through our experiment for a video playback chip generation, we have confirmed that the proposed model has sufficient expressiveness to describe typical real-time/multimedia systems and that the performance and size of the generated circuit is reasonable for practical use. In [7], we have shown network switches for ATM can be efficiently implemented as hardware circuits with the reasonable size and performance using our concurrent EFSM model where multi-way synchronization can be specified but timing constraints are not treated. The proposed method can also be used to synthesize such network switches requiring some timing guarantees.…”

“…Here, we maximize the total sum of executable time ranges of I/O events. Based on the techniques we previously proposed in [7,14], a given specification in the proposed model is implemented as a hardware circuit where it consists of sequential circuits corresponding to EFSMs and a combinational logic circuit for the controller of multi-way synchronization among EFSMs. For timing guarantees, we construct a scheduling circuit indicating schedulable event sequences at each time.…”

Functional qualification of TLM verification

“…Given a transition out-going from a state, the transition is fired, bringing the machine from the current state to the next state and performing the operation included in the update function, once the conditions involved in the enabling function are all satisfied. The EFSM model is widely used for modeling complex systems like reactive systems, communication protocols, buses and controllers driving datapath [11], [12].…”

On the Mutation Analysis of SystemC TLM-2.0 Standard

“…Given a transition out-going from a state, the transition is fired, bringing the machine from the current state to the next state and performing the operation included in the update function, once the conditions involved in the enabling function are all satisfied. The EFSM model is widely used for modeling complex systems like reactive systems, communication protocols, buses and controllers driving data-path [21], [22].…”