2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) 2012
DOI: 10.1109/icecs.2012.6463562
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Hardware-efficient matrix inversion algorithm for complex adaptive systems

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Cited by 13 publications
(7 citation statements)
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“…In [9], a FPGA based efficient matrix inversion procedure is described using QR decomposition. The computation time of a 23 Â 23 matrix inversion on Xilinx Spartan3 XC3S1000 is 253 us.…”
Section: Prototype Chip and Testing Resultsmentioning
confidence: 99%
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“…In [9], a FPGA based efficient matrix inversion procedure is described using QR decomposition. The computation time of a 23 Â 23 matrix inversion on Xilinx Spartan3 XC3S1000 is 253 us.…”
Section: Prototype Chip and Testing Resultsmentioning
confidence: 99%
“…The complexity of the direct analytic method increases exponentially with the size of matrix, so matrix decom-position becomes the most common method applied in matrix inversion with large dimensions, such as LU decomposition (with partial pivoting) [4,5,6,7], QR decomposition [8,9,10], Cholesky decomposition [11], etc. By analyzing these algorithms [12], LU decomposition (with partial pivoting) has better generality than Cholesky decomposition which only applies to symmetric positive definite matrices, and lower computational complexity than QR decomposition.…”
Section: Introductionmentioning
confidence: 99%
“…Although MCC consumes limits the usage of ASICs, and when ASICs are integrated to embedded computing systems to improve system performance, much time is consumed by the interaction between ASIC and other parts of the system; thus, performance improvement is limited. Moreover, the data types of the hardware in [4,7,12,19,8,15] are fixed-point or short floating-point, which indicate short computing times and minimal hardware resources. It can be seen from Table 12 that our widely used processor is more suitable for embedded systems.…”
Section: Performance and Comparisonmentioning
confidence: 99%
“…It can be seen from Table 12 that our widely used processor is more suitable for embedded systems. MCC was also compared with the hardware introduced in [4,7,10,12,19,8,15]. To ensure objectivity, the power consumption of the processors in [12,15] was normalized to 0.18 lm.…”
Section: Performance and Comparisonmentioning
confidence: 99%
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