2011
DOI: 10.1145/1961296.1950372
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Hardware acceleration of transactional memory on commodity systems

Abstract: The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware. We propose that hardware to accelerate software transactional memory (STM) can reside outside an unmodified commodity processor core, thereby substantially reducing implementation costs. This paper introduces Transactional Memory Acceleration using Commodity Cores (TMACC), a hardware-accelerated TM system that does not modify the pr… Show more

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Cited by 4 publications
(2 citation statements)
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“…This proposal was the first soft core prototype with HTM, albeit only with 2 cores; it is not clear what is done in case of overflow or how the design would scale. Another approach is TMACC, which accelerates STMs on commodity machines and uses Bloom filters implemented on FPGAs to do so [18].…”
Section: Related Workmentioning
confidence: 99%
See 1 more Smart Citation
“…This proposal was the first soft core prototype with HTM, albeit only with 2 cores; it is not clear what is done in case of overflow or how the design would scale. Another approach is TMACC, which accelerates STMs on commodity machines and uses Bloom filters implemented on FPGAs to do so [18].…”
Section: Related Workmentioning
confidence: 99%
“…TMACC [18] proposes the acceleration of transactional memory for commodity cores. The conflict detection uses Bloom filters implemented on an FPGA, which accelerates the conflict detection of the STM.…”
Section: Related Workmentioning
confidence: 99%