Hardware-Accelerated Cryptography for Software-Defined Networks with P4

Traditionally, the data plane has been designed with fixed functions to forward packets using a small set of protocols. This closed-design paradigm has limited the capability of the switches to proprietary implementations which are hard-coded by vendors, inducing a lengthy, costly, and inflexible process. Recently, data plane programmability has attracted significant attention from both the research community and the industry, permitting operators and programmers in general to run customized packet processing functions. This open-design paradigm is paving the way for an unprecedented wave of innovation and experimentation by reducing the time of designing, testing, and adopting new protocols; enabling a customized, top-down approach to develop network applications; providing granular visibility of packet events defined by the programmer; reducing complexity and enhancing resource utilization of the programmable switches; and drastically improving the performance of applications that are offloaded to the data plane. Despite the impressive advantages of programmable data plane switches and their importance in modern networks, the literature has been missing a comprehensive survey. To this end, this paper provides a background encompassing an overview of the evolution of networks from legacy to programmable, describing the essentials of programmable switches, and summarizing their advantages over Softwaredefined Networking (SDN) and legacy devices. The paper then presents a unique, comprehensive taxonomy of applications developed with P4 language; surveying, classifying, and analyzing more than 200 articles; discussing challenges and considerations; and presenting future perspectives and open research issues.

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“…Same ideas are applied to P4-MACsec by the same authors. Other works that rely on externs include [193,194].…”

Section: ) Cryptography Schemes Comparison Discussion and Limitationsmentioning

confidence: 99%

“…Malina et al [193] presented a solution where P4 programs invoke cryptographic functions (externs) written in VHDL on FPGAs. The goal of this work is to avoid coding cryptographic functions on hardware (VHDL), and thus enables rapid prototyping of in-network applications with security functions.…”

Section: ) External Cryptographymentioning

confidence: 99%

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

2021

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“…Netcope P4 is used is used in this solution to generate firmware. Its detailed description is available in [4],…”

Section: Summary Of Main Technologies Used In the Solution Of This Papermentioning

confidence: 99%

“…The advantage of GCM mode is that it provides both features -encryption/decryption and authentication. The AES_256_GCM module uses four main components: Encryption, Decryption, Expansion and GCM [4].…”

Section: Aes 256 Gcmmentioning

confidence: 99%

Secure Communication Between High-speed Network Gateways

Cíbik¹,

Hajný²

2022

Proceedings II of the 28st Conference STUDENT EEICT 2022: Selected Papers.

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“…Our SHA-3 component implementation consists of two subcomponents: the Padding Block (the input message alignment) and the Hash Block (the Keccak function core). The input (a message) and output data width (a hash) are 512 bits [5,7].…”

Section: Hash Function Sha-3mentioning

confidence: 99%

Hardware-Accelerated Cryptography For Software-Defined Networks

Cíbik¹

2021

Proceedings II of the 27st Conference STUDENT EEICT 2021

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This paper presents a Software-Defined Network (SDN) cryptographic solution targeted on high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution provides a fast alternative method to develop network-oriented data processing cryptography applications for an accelerator. A high-level programming language -Programming Protocol-independent Packet Processor (P4) -is used to avoid a complex and time-consuming hardware development. The solution consists of two main parts: a library of mainly used cryptographic primitives written in VHSIC Hardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function (SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signature scheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDL with the support for these cryptographic components as external objects of P4 16 .

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Hardware-Accelerated Cryptography for Software-Defined Networks with P4

Cited by 6 publications

References 23 publications

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

Secure Communication Between High-speed Network Gateways

Hardware-Accelerated Cryptography For Software-Defined Networks

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