An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

Kfoury, Elie; Crichigno, Jorge; Bou‐Harb, Elias

doi:10.1109/access.2021.3086704

Cited by 94 publications

(43 citation statements)

References 300 publications

(353 reference statements)

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“…There is an extensive collection of works dealing with P4 in the state of the art, some of them focusing on the description of P4 packet processors [126], surveys of P4 potential applications [127], [128], [129] performance analysis [130] or extensions to support heterogeneous dataplanes [131] as well as the definition of an abstract model for programmable data planes [132]. The capabilities to exploit application layer processing are explored by authors in [133], enabling the fulfillment of FR7.…”

Section: Protocol Independent Switch Architecture (Pisa)mentioning

confidence: 99%

The Future Roadmap of In-Vehicle Network Processing: A HW-Centric (R-)evolution

2022

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The automotive industry is undergoing a deep revolution. With the race towards autonomous driving, the amount of technologies, sensors and actuators that need to be integrated in the vehicle increases exponentially. This imposes new great challenges in the vehicle electric/electronic (E/E) architecture and, especially, in the In-Vehicle Network (IVN). In this work, we analyze the evolution of IVNs, and focus on the main network processing platform integrated in them: the Gateway (GW). We derive the requirements of Network Processing Platforms that need to be fulfilled by future GW controllers focusing on two perspectives: functional requirements and structural requirements. Functional requirements refer to the functionalities that need to be delivered by these network processing platforms. Structural requirements refer to design aspects which ensure the feasibility, usability and future evolution of the design. By focusing on the Network Processing architecture, we review the available options in the state of the art, both in industry and academia. We evaluate the strengths and weaknesses of each architecture in terms of the coverage provided for the functional and structural requirements. In our analysis, we detect a gap in this area: there is currently no architecture fulfilling all the requirements of future automotive GW controllers. In light of the available network processing architectures and the current technology landscape, we identify Hardware (HW) accelerators and custom processor design as a key differentiation factor which boosts the devices performance. From our perspective, this points to a need -and a research opportunity -to explore network processing architectures with a strong HW focus, unleashing the potential of next-generation network processors and supporting the demanding requirements of future autonomous and connected vehicles.

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Section: Protocol Independent Switch Architecture (Pisa)mentioning

confidence: 99%

The Future Roadmap of In-Vehicle Network Processing: A HW-Centric (R-)evolution

2022

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“…Last, some solutions target programmable switches [11,24,25], that provide more flexibility by allowing the programmer to specify the type of processing to be executed on the packets with high-level programming languages. Programmable switches are often implemented through Reconfigurable Match-Action Tables (RMTs) [26][27][28][29], and can be configured with the P4 programming language [30][31][32]. In such architecture, each packet traverses a pipeline of 10 − 20 stages [33], each applying a longest-prefix match of one or more packet fields against a set of rules, to select an action to be executed on that field.…”

Section: Programmable Switchesmentioning

confidence: 99%

Flare: Flexible In-Network Allreduce

De Sensi,

Di Girolamo,

Ashkboos

et al. 2021

Preprint

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The allreduce operation is one of the most commonly used communication routines in distributed applications. To improve its bandwidth and to reduce network traffic, this operation can be accelerated by offloading it to network switches, that aggregate the data received from the hosts, and send them back the aggregated result. However, existing solutions provide limited customization opportunities and might provide suboptimal performance when dealing with custom operators and data types, with sparse data, or when reproducibility of the aggregation is a concern. To deal with these problems, in this work we design a flexible programmable switch by using as a building block PsPIN, a RISC-V architecture implementing the sPIN programming model. We then design, model, and analyze different algorithms for executing the aggregation on this architecture, showing performance improvements compared to state-of-the-art approaches. CCS CONCEPTS• Networks → In-network processing; • Hardware → Networking hardware; • Computer systems organization → Distributed architectures.

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“…Such flexibility has also motivated researchers to enhance networks with the P4-based solutions [9]. The authors of [13] use P4 to flexibly position the security features in the switches for detecting and mitigating IP-address spoofing attacks.…”

Section: Security Solutions With P4mentioning

confidence: 99%

Mitigation of IPv6 Router Spoofing Attacks with P4

Mönnich

Bülbül

Ergenç

et al. 2021

Proceedings of the Symposium on Architectures for Networking and Communications Systems

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The IPv6 protocol will sooner or later replace IPv4 to cope with an exponentially increasing number of connected devices. Some of the most significant functions of IPv6 networks are network discovery, maintenance, and routing mechanisms to promote auto-configuration of the network with less manual effort. Network Discovery Protocol (NDP) is an important protocol in IPv6 to identify the relationships between different neighboring devices in a network. However, it is also subject to spoofing and man-in-the-middle attacks. This paper implements an attack detection and mitigation strategy called Router Advertisement Guard (RA-Guard) in P4 to defend IPv6 networks against router spoofing attacks directly on the data plane. In contrast to very few proprietary RA-Guard implementations with limited details, we consider different scenarios to exploit IPv6 packet structure and publish our implementation open-source. The experiments show that our P4-based implementation can detect and mitigate spoofing attacks leveraging RA-Guard together with its control plane extensions. CCS CONCEPTS• Networks → Programmable networks; Network layer protocols; • Security and privacy → Security protocols.

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An Exhaustive Survey on P4 Programmable Data Plane Switches: Taxonomy, Applications, Challenges, and Future Trends

Cited by 94 publications

References 300 publications

The Future Roadmap of In-Vehicle Network Processing: A HW-Centric (R-)evolution

The Future Roadmap of In-Vehicle Network Processing: A HW-Centric (R-)evolution

Flare: Flexible In-Network Allreduce

Mitigation of IPv6 Router Spoofing Attacks with P4

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