Handbook of Floating-Point Arithmetic

Muller, Jean-Michel; Brunie, Nicolas; Dinechin, Florent de; Jeannerod, Claude-Pierre; Joldeş, Mioara; Lefèvre, Vincent; Melquiond, Guillaume; Revol, Nathalie; Torres, Serge

doi:10.1007/978-3-319-76526-6

Cited by 146 publications

(80 citation statements)

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“…The implementation of a mathematical function, such as exp(x), sin(x) or atan(x), in the floating-point environment provided by IEEE754-2008 has been extensively studied and described in the literature [4], [5], [6], [7], [8], [9], [10]. Classically, a mathematical function on a floating-point argument is computed in four or five steps.…”

Section: Implementation Of Mathematical Functionsmentioning

confidence: 99%

A new open-source SIMD vector libm fully implemented with high-level scalar C

Lauter

2016

2016 50th Asilomar Conference on Signals, Systems and Computers

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To cite this version:Christoph Abstract-Systems support mathematical functions like exp, sin, cos through mathematical libraries (libm). With increasingly parallel hardware, scalar libm functions do not suffice; implementations that work on vectors in an element-by-element (SIMD) fashion are required. Only few Open-Source implementations of vector libms exist. They are mostly written in assembly, which hinders portability and maintenance. As they depend on the scalar system libm for special case handling, the existing vector libms may induce a source of non-reproducibility.We present an Open-Source vector libm implemented with high-level scalar C that a modern compiler can translate to SIMD code. The error of all functions does not exceed 8 ulp, while a performance gain of up to 278.5% is obtained. Our library is fully free-standing, i.e. it does not depend on any other system library.

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Section: Implementation Of Mathematical Functionsmentioning

confidence: 99%

A new open-source SIMD vector libm fully implemented with high-level scalar C

Lauter

2016

2016 50th Asilomar Conference on Signals, Systems and Computers

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“…A FMA (Fused Multiply and Add) is also available. Therefore T woP rod is replaced by 2M ultF M A [10] which only requires two FMAs to compute the product and its error, and so improves performance. Figure 4 exhibits respective ratios of 2×, 4×, 6× and 6× for asum, dot product, euclidean norm and matrix-vector multiplication.…”

Section: Implementation and Performance Resultsmentioning

confidence: 99%

Reproducible, Accurately Rounded and Efficient BLAS

Chohra

Langlois

Parello

2017

Euro-Par 2016: Parallel Processing Workshops

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Abstract. Numerical reproducibility failures rise in parallel computation because floating-point summation is non-associative. Massively parallel and optimized executions dynamically modify the floating-point operation order. Hence, numerical results may change from one run to another. We propose to ensure reproducibility by extending as far as possible the IEEE-754 correct rounding property to larger operation sequences. We introduce our RARE-BLAS (Reproducible, Accurately Rounded and Efficient BLAS) that benefits from recent accurate and efficient summation algorithms. Solutions for level 1 (asum, dot and nrm2) and level 2 (gemv) routines are presented. Their performance is studied compared to the Intel MKL library and other existing reproducible algorithms. For both shared and distributed memory parallel systems, we exhibit an extra-cost of 2× in the worst case scenario, which is satisfying for a wide range of applications. For Intel Xeon Phi accelerator a larger extra-cost (4× to 6×) is observed, which is still helpful at least for debugging and validation steps.

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“…There are several ways to perform this operation, although unbiased rounding-to-nearest has the best characteristics [1] [2]. It provides the closest possible number to the original exact value, but if the exact value is exactly halfway between two numbers, then it is selected randomly.…”

Section: Introductionmentioning

confidence: 99%

Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest

Hormigo

Villalba

2016

IEEE Trans. VLSI Syst.

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Abstract-This paper analyzes the benefits of using HUB formats to implement floating-point arithmetic under round-tonearest mode from a quantitative point of view. Using HUB formats to represent numbers allows the removal of the rounding logic of arithmetic units, including sticky-bit computation. This is shown for floating-point adders, multipliers, and converters. Experimental analysis demonstrates that HUB formats and the corresponding arithmetic units maintain the same accuracy as conventional ones. On the other hand, the implementation of these units, based on basic architectures, shows that HUB formats simultaneously improve area, speed, and power consumption. Specifically, based on data obtained from the synthesis, a HUB single-precision adder is about 14% faster but consumes 38% less area and 26% less power than the conventional adder. Similarly, a HUB single-precision multiplier is 17% faster, uses 22% less area, and consumes slightly less power than conventional multiplier. At the same speed, the adder and multiplier achieve area and power reductions of up to 50% and 40%, respectively.

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Handbook of Floating-Point Arithmetic

Cited by 146 publications

References 0 publications

A new open-source SIMD vector libm fully implemented with high-level scalar C

A new open-source SIMD vector libm fully implemented with high-level scalar C

Reproducible, Accurately Rounded and Efficient BLAS

Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest

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