2016
DOI: 10.1109/tvlsi.2015.2502318
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Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest

Abstract: Abstract-This paper analyzes the benefits of using HUB formats to implement floating-point arithmetic under round-tonearest mode from a quantitative point of view. Using HUB formats to represent numbers allows the removal of the rounding logic of arithmetic units, including sticky-bit computation. This is shown for floating-point adders, multipliers, and converters. Experimental analysis demonstrates that HUB formats and the corresponding arithmetic units maintain the same accuracy as conventional ones. On the… Show more

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Cited by 19 publications
(28 citation statements)
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“…Thus, the unbiased rounding is achieved by truncation and forcing the LSB of the representative form to zero, that is the bit M ′ [m−2] = 0, as proved in [5]. Thus, this unbiased round to nearest is not so different from the IEEE 745 tie to even, since it is like a tie to even of the representative form.…”
Section: Consider a Normalized Non-hub Numbermentioning
confidence: 96%
See 3 more Smart Citations
“…Thus, the unbiased rounding is achieved by truncation and forcing the LSB of the representative form to zero, that is the bit M ′ [m−2] = 0, as proved in [5]. Thus, this unbiased round to nearest is not so different from the IEEE 745 tie to even, since it is like a tie to even of the representative form.…”
Section: Consider a Normalized Non-hub Numbermentioning
confidence: 96%
“…In some applications, this causes annoying statistical anomalies. To avoid this problem in those applications, an unbiased round to nearest is achieved in [5] for HUB without carry propagation. The tie condition takes place when the bits beyond bit…”
Section: Consider a Normalized Non-hub Numbermentioning
confidence: 99%
See 2 more Smart Citations
“…In [11], the authors analyze the benefits of using HUB format for FP adders, multipliers, and converters. Experimental analysis demonstrate that HUB format maintains the same accuracy as the conventional format for the aforementioned units, simultaneously improving area, speed, and power consumption (14% speed-up, 38% less area and 26% less power for single precision FP adder, 17% speed-up, 22% less area and slightly less power for the FP multiplier).…”
Section: Introductionmentioning
confidence: 99%